Feb26,2010

Minutes of today's IEEE 1149.1 - Initialize Sub-Group Meeting

Attendees:
Dave Dubberke
Ken Parker
Roland Latvala
Francisco Russi
CJ Clark
Sivikamar Jaya (sp?)
John Braden
Carl Barnhart

Minutes:
On today's call we continued discussions about the BSDL attributes required to support the PDL 
side file usage. There is general agreement on using BSDL attributes for REGISTERS, MNEMONICS, 
and associated ASSIGNMENTS definitions.

Ken Parker and CJ Clark gave reviews of their example BSDL files. Most of the meeting was spent 
discussing register fields and possible coding styles. Several of us favored the Verilog [0:18] 
range delimiter, rather than the VHDL bit_vector (0 to 18).

It was also generally agreed that the BSDL port names should be associated with the INIT_DATA register 
fields for diagnosis and debug as Ken had brought up in email thread for associated pin names. However 
since multiple pin maps are possible the port name is the better choice. 

Actions:
1. Roland to look into providing a real world chip with INIT requirements in order to generate a true to 
life BSDL example for discussion.

Next meeting date:
Same time next Friday March 5th. Carol is back next week.


Regards,
Roland Latvala