-- Straw Dog 1.0 BSDL description of a simple .4 device
-- This is an 1149.1-compatible BSDL that does encode 1149.4 features.
-- Still suitable for use with 1149.1 Interconnect Testing software.

 
entity Straw_Dog is
generic (PHYSICAL_PIN_MAP : string := "dip");

port(TCK, TDI, TMS: in bit;
A, B: in bit; -- Digital pins
W, Y: inout bit; -- Analog pins
TDO: out bit;
AT1, AT2: inout bit; -- ATAP pins (bidir)
GND, VCC:linkage bit);

use STD_1149_1_1994.all; -- Get Std 1149.1-1990 attributes and definitions
use STD_1149_4_2000.all; -- Get .4 attributes and definitions

attribute COMPONENT_CONFORMANCE of Straw_Dog : entity is "STD_1149_1_1993";

attribute PIN_MAP of Straw_Dog : entity is PHYSICAL_PIN_MAP;

constant dip:PIN_MAP_STRING:="A:7, B:8, W:9, Y:12, AT1:10, AT2:11, " &
"GND:2, VCC:1, TDO:6, TMS:3, TCK:4, TDI:5";

attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6, BOTH);

attribute INSTRUCTION_LENGTH of Straw_Dog : entity is 2;

attribute INSTRUCTION_OPCODE of Straw_Dog : entity is
"BYPASS (11)," &
"EXTEST (00)," &
"SAMPLE (01)," &
"PROBE (10)";

attribute INSTRUCTION_CAPTURE of Straw_Dog : entity is "01";

attribute BOUNDARY_LENGTH of Straw_Dog : entity is 14;

attribute BOUNDARY_REGISTER of Straw_Dog : entity is
-- num cell port function safe [ccell disval rslt]
"0 (BC_1, A, input, x), " &
"1 (BC_1, B, input, x), " &

-- The following cells are TBIC controls
-- num cell port function safe [ccell disval rslt]
"2 (BC_7, AT1, bidir, 0, 4, 0, Z), " &
"3 (BC_7, AT2, bidir, 0, 4, 0, Z), " &
"4 (BC_1, *, control, 0), " & -- required safe bits
"5 (BC_1, *, internal, 0), " & -- required safe bits

 
 
 
-- The following cells control the Y analog signal

"6 (BC_7, Y, bidir, 0, 7, 0, Z), " &
"7 (BC_1, *, control, 0), " & -- required safe bits
"8 (BC_1, *, internal, 0), " & -- required safe bits
"9 (BC_1, *, internal, 0), " & -- required safe bits

 
-- The following cells control the W analog signal

"10 (BC_7, W, bidir, 0, 11, 0, Z), " &
"11 (BC_1, *, control, 0), " & -- required safe bits
"12 (BC_1, *, internal, 0), " & -- required safe bits
"13 (BC_1, *, internal, 0) " ; -- required safe bits

-- Now add extensions for 1149.4. The declarations given here could be
-- included in a user package named "STD_1149_4_200x instead of being listed
-- here.

-- Extension declarations
attribute ABM_List : BSDL_Extension;
attribute TBIC_List : BSDL Extension
attribute SWITCH_List : BSDL_Extension;;
attribute Parametrics_List : BSDL_Extension;
attribute Residual_Table : BSDL_Extension;

-- Extension definitions
attribute ABM_List of Straw_Dog : entity is
-- ABM(num), Port, Bus 1, Bus 2, TBIC Partition, Switches
"ABM(1) ( W, 12, 13, TBIC(1), SW_List(1)), "&
"ABM(2) ( Y, 8, 9, TBIC(1), SW_List(1)) ";

attribute TBIC_List of Straw_Dog : entity is
-- TBIC, AT1 Port, AT2 Port, Char_cell, Switches
"TBIC(1) ( AT1, AT2, 5, SW_List(2)) ";

attribute Switch_List of Straw_Dog : entity is
"SW_List(1) ("&
-- Param, V_threshold, Tolerance, Reference_port
"Vth, ( 2.5, 10%, Vss), "&
-- pathway from_port to_port Par_List
"SH ( Vdd, ABM, Par_List(1)), "&
"SL ( ABM, Vss, Par_List(1)), "&
"SG ( ABM, Vss, Par_List(1)), "&
"S5+SB1 ( AT1, ABM, Par_List(2)), "&
"S6+SB2 ( ABM, AB2, Par_List(2)), "&
") ";

"SW_List(2) ("&
-- Param, V_threshold, Tolerance, Reference_port
"Vth, ( 2.5, 10%, Vss), "&
-- pathway from_port to_port Par_List
"S1 ( Vdd, AT1, Par_List(3)), "&
"S3 ( AT1, Vss, Par_List(3)), "&
"S2 ( Vdd, AT2, Par_List(3)), "&
"S4 ( AT2, Vss, Par_List(3)), "&
") ";

 
attribute Parametrics_List of Straw_Dog : entity is

-- Table Min_Z, Max_Z, Min_off, Max_off, Min_I, Max_I, Min_V, Max_V
"Par_List(1) (400, 600, 0, 0, 0, 0, 0, 5) ";
"Par_List(2) (250, 400, 0, 0, 0, 0, 0, 5) ";
"Par_List(3) (175, 225, 0, 0, 0, 0, 0, 5) ";

attribute Residual_Table of Straw_Dog : entity is
-- Residual Elem, Units, From, To, Min, Max, Match/Correl
"Z1 (Ohms, ABM(1), Internal N, 50, 60, *), "&
"Z2 (Ohms, Internal N, W, 110, 120, Z1/0.95), "&
"Z3 (Ohms, Internal N, ABM(2), 40, 45, *), "&
"W1 (*, ABM(2), Y, *, *, *) ";

end Straw_Dog;