IEEE P1394b Working Group Meeting,
Marriott Hotel,
Santa Clara, CA,
Monday, April 7, 1997,
8:30 - food
9:00 - Start of Session
Chair: Michael D. Johas-Teener
Editor:
Eric Cabot Hannah
Secretary: Richard Lloyd Churchill
Agenda
Administrivia
Introductions
Next Meeting, 5/5/97, Santa Clara
Par Status
Draft Standard version 0.01 (Eric Hannah)
Simulation Results
IBM
Berg
Protocol Group Volunteers
Schedule, Rev A - June 97
P1394a requirements
Introductions around ...
Next meeting will be May 5, in Santa Clara, since a site couldn't
be found
in Mass. We will attempt to colocate with 1394a
group. There is a meeting
planned for Honolulu in August.
PAR is in process, and should see action in the next couple of months.
Lack of progress on protocol noted, with a need to correct the
situation.
A small sub-group needs to be established to start
work on this, which
involves start-up, initialization, etc. ... Mike
Sorna, Eric Hannah,
Colin Whitby-Strevens, David Wooten, Mine Teener,
Steve Bard are the
"volunteers." This
will cover a wide range of duties regarding interplay
between b and older versions of 1394, arbitration,
8B/10B encoding and
behavior, etc. Need to delineate, and parcel out
tasks.
Patrick Yu will seek closure on IBM's licensing of the proposed
8B/10B
encoding scheme.
Fiber connectivity is a requirement, and we must address it. This
will
require pushing some additional burden on the
P1394a group, with "ping"
being highly desired and in need of more work.
There are questions about
jitter budgets, etc. .... What is the model of
the connecitivity?
(How can TA drive a fiber standard?
-- Can serve as a discussion group
for getting things started. Must ensure
that there is only one model
of fiber connectivity when all is said
and done.)
Connection Model -- How do people this working? What will it be used for?
Pages up to 31 are boiler-plate, with much left to be filled in.
Content
starts at page 31.
Editor's opinion is that the tolerances on impedence must be more
tightly
constrained.
Signal attenuation is also critical, according to editor.
Propagation skews, relative between pairs, needs to be examined.
Fiber
Channel calls for < 5% (50 ps) based upon limit
attainable by cable vendors
at the time. Cables may be as low as 5 ps -- at
a high price. This is
linked to signal rise times. (This is differential
skew.) Karl Nakamura
will assist ... (action item -- he needs to write
down some numbers so we
are at the same starting point.)
(Karl has additional action item to talk to cable folks about skews, etc.)
Questions raised regarding the need for a 2 V differential swing,
as we are
not seeking cable lengths comparable to Fiber
Channel. We can likely use
far less. (FC may be going to lower swings at
present lengths ...) Can
likely live with 1.1 V, perhaps lower (800 mV).
Also, what voltage, etc.,
are required to directly drive a VCEL. We are
only trying to solve the
problem for 5m copper and shorter.
Deterministic and random jitters are "tentative", and
may be looser. The
trade-offs will need to be examined.
There may be problems in 1999/2000 time frame producing S1600-bilingual
PHYs. There may be several means to accomplish
"comparable" functionality,
but the quantity of work that has gone into this
so far is not great. There
was some tentative discussion of how such could
be accomplished.
Receiver sensitivity of 300 mV recommended by Karl Nakamura.
Table 5-3, through connection values, S800 through S3200, need
to change,
also the operating distance limited to 5m, not
25m. All charts need to be
made consistent.
Clause 6 is based upon IBM 8B/10B scheme, which is patented. Bit
ordering
is an issue. (Lines 61 and 62, page 41, are internally
inconsistent.) We
may just use the same ordering as FC and Gbit
Ethernet. (There was a lot
of discussion regarding bit transmission ordering,
with much confusion as
to who was asserting what. We need to ensure that
we end up consistent on
transmission ordering. P1394.2 mapping is probably
the same as FC, so if
we are consistent with them we should have well-tested
cells already.)
Jerry Hauck has action item regarding 8B/10B coding, CRCs and
bit/burst
error detection.
In clause 6.1.6, information relative to FC and Gb Ethernet ...
Clause 7 is very tentative, and will be extensively revised by
the protocol
sub-group. Present clause is based upon the Fiber
Channel mechanisms, and
was originally written by Dave LaFollette.
Task -- redesign -1995 I/O system to
--
allow data rates of
4 Gb/s,
maintain backward
compatibility.
Produced complex simulation schematic.
Believe existing cable good to 3 Gb/s (7.5 GHz).
Geometry changes to connector in cable,
receptable, gets existing cable
to 4.5 Gb/s (approximate bandwidth =
12 GHz).
Plan preliminary design by end of April '97
Spice files
available in May '97
Initial
Samples in July '97
Production
in October '97
-- All this is expected to be plug-compatible
with the existing standard
-- and devices.
[simulated eye diagrams were requested and tentatively promised.]
[Comment -- Colin Whitby-Strevens
-- We need to be aware of the pending
closure of the P1394a standard to new proposals. We need to make
what
suggestions and requests need to be dealt with very soon.]
[Recess for Lunch]
[Resume at 1:00PM]
-- Phy delay: 11 given meaning -- indicates
delay greater than covered
by spec. (144 us +
5m line delay), use pinging to determine delay
-- Pinging is needed
-- better description
of first-bit delay (jitter vs. propagation)
-- bound min/max of
response time
(should be very tight. Jerry Hauck prefers to have timeer in link.)
-- Power management proposals: Please
consider fiber cases.
-- Fiber issues? 1394a
doesn't need to deal with this, but should be
extensible.
-- prefer to have
power mgt consider a polled mode
-- issue of whether
a PHY is required to operate at all speeds slower
than
it's highest.
| The Group | ||
| (Peter Johansson will have to be involved to some extent.) | ||
| IBM | Keith H. | |
| Intel Eric Hannah | ||
| SGS | Colin Whitby-Strevens | |
| CPQ | David Wooten | |
| ff | Mike D. Johas-Teener - facilitator | |
| Intel Steve Bard | ||
| NEC | N. Furuya (volunteered by Patrick Yu) | |
| LSI | Karl Nakamura | |
Connection Initialization (Start in DS then move to "beta",
or start in
beta)
Speed resolution
Shutdown protocol, with power-up procedure
Mapping of 1394a arbitration onto 1394b (codes,
etc.)
maybe better use of -- 1394a improved
over b
(token arbitration
improvements on 1394b Beta )
phy-link I/F for higher speeds
Data encoding and Signalling for various speeds
(mapping old speeds, etc.)
Self-ID changes for additional speed codes, maps,
etc.
topology updates
gap calculations
testability
loop-back enable
self-checking
Assignments:
Testability - Patrick Yu (NEC)
Connection Init - Steve Bard
Mapping 1394a arbitration - Karl Nakamura
PHY/LINK I/F - Robbie Shergill
Data Encoding - Keith H.
topology updates - Eric Hannah and Jerry
Hauck
Berg connector update
progress reports from all action items
June 9 meeting in Seattle
(July 7 in Maui? -- possibly in place of the meeting
at TA)
Summer TA in Fremont(?), in July -- will meet
there on July 28.
August meeting ???
Sept. ??? (TI may volunteer -- in Dallas)
October TA meeting in Phoenix -- co-locate (Oct.
6, X3T10 in Tucson)
November ???? (Las Vegas?)
December ???? (Dec. 8 is X3T10 in Orlando)
[Adjourned at ~3:00 PM]
------------------------------------------------------------------------------
List of Attendees:
| David R. Wooten Compaq davidw@bangate.compaq.com |
Robbie Shergill National Semiconductor rss@berlioz.nsc.com |
| Eric Hannah Intel eric_hannah@ccm.sc.intel.com |
Dave LaFollette Intel dlafolle@mipos2.sc.intel.com |
| Gene Matter Intel gene_p_matter@ccm.fm.intel.com |
Ganesh Murthy Intel ganesh_murthy@ccm.jf.intel.com |
| Richard Churchill Compaq richardc@bangate.compaq.com |
Steve Bard Intel steve_bard@ccm.jf.intel.com |
| Cyrus Momeni Cirrus Logic Cyrus@corp.cirrus.com |
Brad Saunders Rockwell bradley.saunders@nb.rockwell.com |
| Bill Northey Berg northewa@bergelect.com |
Richard Prentice Texas Instruments rprentice@ti.com |
| Mike Gardner Molex mgardner@molex.com |
Tatsuya Arai Hirose Electric tatsuyaa@hiroseusa |
| Michael Cheong Molex mcheong@molex.com |
Jonathan Buck AMP jon.buck@amp.com |
| Dave Brunker Molex dbrunker@molex.com |
Karl Nakamura LSI Logic karln@lsil.com |
| Patrick Yu NEC patick_yu@el.nec.com |
Rich Hovey LSI Logic rhovey@lsil.com |
| Jerry Hauck Intel jerry_hauck@ccm.sc.intel.com |
Daniel Meirsman Philips daniel.meirsman@leu.ce.philips.com |
| Jerry Kachlic Molex jkachlic@molex.com |
Mark Evans Quantum Corp. mevans@qutm.com |
| Firooz Farhoomand Matsushita/Panasonic firoozf@ix.netcom.com |
Colin Whitby-Strevens SGS-Thomson Microelectronics colinws@bristol.st.com |