This meeting will be held in conjunction with the
International Test Conference (ITC'2003).
It will be an awareness meeting where updates will be provided about the
different efforts related to this standard, including:
General Information
History
IEEE P1500 SECT started in 1995 as a TAC of the TTTC (Test Technology Technical
Council) of the IEEE Computer Society. In June 1997, the IEEE Standards
Activities Board has approved our Project Authorization Request, hence since
then we are formally considered a standardization Working Group. IEEE P1500
currently targets a draft standard for non-merged digital logic and memory cores
to be ready for ballot in 2001. Future extensions will include mergeable cores
and analog and mixed-analog/digital cores.
Mission Statement
The following is taken from the Project Authorization Request to the IEEE.
Activities
To subscribe, please send e-mail to Yervant Zorian
(zorian@logicvision.com).
People
IEEE P1500 SECT Task Forces
The main technical work of P1500 is done in the following Task Forces.
Task Forces have regular meetings, either face-to-face or via
conference calls. If you are interested in contributing to the technical work
done by the Task Forces, please contact their respective chair persons.
Define language constructs to describe the test aspects of cores.
The P1500 CTL Task Force is also part of the STIL-A committee that works
on extensions of IEEE 1450
(STIL).
Most recent status update: October 2001.
Define a standard wrapper plus interface to on-chip Test Access
Mechanism, to allow plug-n-play test access to embedded cores.
Most recent status update: March 2003.
Define the two compliance levels of IEEE P1500, "Wrapper-Prepared" and
"Wrapped".
Most recent status update: October 2002.
Define common terminology for P1500. This activity takes place in close
cooperation with the VSI Alliance.
Most recent status update: January 1999.
Preparation of the draft P1500 standard.
Most recent status update: October 2002.
Study what core providers of test-mergeable cores can do to help
their users w.r.t. test and come up with a set of DfT guidelines.
Most recent status update: March 2001.
Collect and distribute benchmark circuits. This activity takes place in
close cooperation with the ITC'99
Benchmarks effort.
Most recent status update: September 1999.
IEEE P1500 SECT Meetings
P1500 Working Group meetings open to everyone. The meetings are mostly
scheduled around major conference in the domain of IC design and test. The Task
Forces present progress updates, and often there are other interesting
presentations and/or discussions on the agenda.
Upcoming IEEE P1500 SECT Meetings
The following P1500 Working Group meetings are planned for the remainder of
2003.
Past IEEE P1500 SECT Meetings
Clicking on the meeting dates brings you to meeting minutes and presentation
material (if available).
P1500 Meeting Attendance Record
Attendance at three of the past five consecutive official P1500 meetings is
required to maintain voting privileges at P1500 meetings. For active members of
the various P1500 Task Force meetings, one of the past five consecutive
official P1500 meetings is required to maintain voting privileges. In addition,
voting is limited to at most two votes per company or institute.
The following table shows the P1500 meeting attendance record.
IEEE Workshop on Testing Embedded Core-based Systems
The 6th IEEE International Workshop on Testing Embedded Core-based
Systems (TECS'02) will be held in Monterey,
California at the start of May 2002. The workshop will be immediately
after the VLSI Test Symposium
(VTS'02).
Useful Links
IEEE P1500 Working Group on Standard for Embedded Core Test (SECT)
<coretest@computer.org>
Alan Hales, Texas Instruments
(alanh@ti.com)
Erik Jan Marinissen,
Philips Research
(Erik . Jan . Marinissen @ philips . com - e-mail address mangled to prevent spamming)
Last modified: June 24, 2003