P1500 Meeting Minutes
Monday October 29th, 2001

Attendees

Bill Aronson		National Semi
Luis Basto		Analog Devices
Sudipta Bhawmik		Agere Systems
Dwayne Burek		LogicVision
Jeffrey Butler		National Semi
Chen-Huan Chiang		Lucent
Bill Chown		IMS
CJ Clark		Intellitech
Mike Collins		Collins Design
Adam Cron		Synopsys
Scott Davidson		Sun Microsystems
Bulent Dervisoglu		Cadence
Jason Doege		Inovys
Ted Eaton		Sun Microsystems
Joan Figueras		UPC
David Gallagher		Mentor Graphics
Grady Giles		AMD
Alan Hales		Texas Instruments
Andy Halliday		TriMedia Tech

Rohit Kapur		Synopsys Inc
Douglas Kay		Cisco
Brion Keller		IBM
Marc Loranger		Credence
Maurice Lousberg		Philips
Samy Makar		Transmeta
Erik Jan Marinissen		Philips
Greg Maston		Synopsys
Mike Mateja		Mentor Graphics
Teresa McLaurin		Arm
Fidel Muradali		Agilent
Paul Reuter		Mentor Graphics
Mike Ricchetti		Intellitech
Francisco da Silva		Synopsys
Tom Waayers		Philips
Ron Walther		IBM
Cheng-Wen Wu		National Tsing Hua Univ
Yervant Zorian		LogicVision/Virage

Chairman Yervant Zorian
Minutes kindly provided by Maurice Lousberg, Philips
Drinks & Food kindly provided by Rohit Kapur, Synopsys
Audiovisual Support kindly provided by Alan Hales, TI

1. Introduction round

2. Introduction by Yervant

3. Scalable Architecture Task Force by G Giles

Q.

Bulent. Dervisoglu: Why does bypass run on WRCK?

A.

Because we own the bypass path. And need to make sure this path works on "our" clock. Also this makes it plug & play.

Q.

Brion Keller: WBR can have auxiliary clocks. Does this outlaw LSSD implementations

A.

It was implemented to facilitate LSSD. But not so for the Bypass and WIR. A clock-chopper circuit would do the trick on these.

Q.

What happened to bidirectional ports on cores.

A.

They are not supposed to exist for cores.

Q.

How to know what to implement in the wrapper cell model (Yellow box)

A.

Depends e.g. on the number of transitions the cell needs to generate. CTL will describe this.

Q.

Rohit Kapur: Is apply externally visible

A.

Only internally. It is an implicit and context dependent event.

Do we need to annotate it in CTL?
You need to in order to make clear when the data is available

Q.

Maurice Lousberg: Are the cell events separate per cell or does the whole wrapper have the same event at the same time.

A.

Probably yes, but not yet clearly defined.

Q.

Tom Waayers: Should the hold mode on wrapper cells be more explicit?

A.

The absence of events is the hold, but we should make it more explicit.

Q.

Erik Jan Marinissen: How to test the Cell CFO mux?

A.

A blatant oversight the tiger team needs to look into!!!

Q.

Adam Cron: Will you be finished in 2 years?

A.

No answer for the moment.

What about tiger teams?

SIL ok
PIL just started

3.1 WBR Tiger Team by F da Silva

Douglas Kay: What is slow operation of the PIL
The shift operations is relatively slow compared to the functional speed

3.2 WIP Tiger Team by M Ricchetti

Some explanatory questions about hierarchy

3.3 Instruction Tiger Team by T McLaurin

Questions about names of the instructions
Use longer names, self explanatory

Q.: Erik Jan Marinissen: make intest & extest test mandatory for each port mandatory hardware should come with mandatory tests
Q.: Bulent: Why isn't wsafestate mandatory?
A.: if no cell in the wrapper needs the safe mode, then there is no need to implement it.
Q.: Bulent: We need to further specify the events belonging to the instructions.
A.: If not, then you can cause problems between cores. Especially in case of extest instructions.
Dwayne Burek: we also miss the protocol to go with it.
Q.: Should we specify pre-canned protocols.
A.: Especially for WEXTEST and WEXTESTP to create plug&play

4. CTL Task Force by R Kapur

CTL syntax skipped, see ITC presentation on Tuesday.
The work is now 95% done
TestResourceConstraints moved to 1450.3
Should we go into prescriptive CTL.
e.g. the communication between core provider and core user.
Erik Jan Marinissen: descriptive CTL could be used as prescriptive CTL. "Give me a wrapper as described in this CTL"
A lively debate started here.

5. Compliance Definition TF by Erik Jan Marinissen

Discussion on compliancy level names. Still not satisfied with names.
Discussion on wrapper parameters. A list is under discussion.
Is this complete?
Maurice Lousberg: eg. add list of auxiliary clocks for wrapper.
Is this list of parameters the "prescriptive CTL"?
- Currently buried in the rest of the CTL. Do we need to cover that more explicitly in CTL?

6. Documentation Task Force by Erik Jan Marinissen

Adam Cron: IEEE also sells draft standards.
EJM: we don't see a benefit in that.
Maurice: add index (as a grey section, ie. not filled in)

7. Mergeable Core Task Force by Bhawmik Sudipta

Q.: Adam Cron: what is difference to CTL.
A.: In softcores you don't have the DFT already implemented, so you can't refer to it. It is also design rules + possibly prescriptive CTL

Currently progress is a bit stalled since it is not known where document will go to. P1500 Standard or separate document.

Yervant Zorian: IEEE also allows to describe recommended practice.
Rohit Kapur: don't stall, try being more proactive.
Maurice Lousberg: do we need to ballot a recommended practice document?
Yervant: according to me not but I will look up the actual procedure.

Chairman		Yervant Zorian
Minutes		kindly provided by Maurice Lousberg, Philips
Drinks & Food		kindly provided by Rohit Kapur, Synopsys
Audiovisual Support		kindly provided by Alan Hales, TI

P1500 Meeting MinutesMonday October 29th, 2001

Attendees

1. Introduction round

2. Introduction by Yervant

3. Scalable Architecture Task Force by G Giles

3.1 WBR Tiger Team by F da Silva

3.2 WIP Tiger Team by M Ricchetti

3.3 Instruction Tiger Team by T McLaurin

4. CTL Task Force by R Kapur

5. Compliance Definition TF by Erik Jan Marinissen

6. Documentation Task Force by Erik Jan Marinissen

7. Mergeable Core Task Force by Bhawmik Sudipta

8. Closing remarks by Yervant Zorian

P1500 Meeting Minutes
Monday October 29th, 2001