Meeting Minutes for P1500 Video Conference
March 15th, 2002

Attendees

Dallas
Luis Basto  
Jason Doege
Grady Giles
Alan Hales  
Ron Walther
Lee Whetsel
Sunnyvale
Bulent Dervisoglu  
Rohit Kapur
Fidel Muradali
Tony Taylor  
Yervant Zorian
Eindhoven
Tom Waayers  
Audio
Douglas Kay  
Mike Ricchetti  

Scribe

Fidel - 1st half of minutes
Jason - 2nd half

Minutes

9:25 Start (after some technical difficulties with video link)

Yervant opened with request to discuss the remaining work needed before ballot. That is the open topics not yet discussed & the open topics discussed but not resolved.

Rohit - CTL Syntax & semantics can be frozen but they are still open to change. He need 2 months to check completeness of definitions. He needs 2 months to do documents and examples (these examples are stripped down and just to check modes of operation). He also needs an example from CTAG for testing.

(in response to Ron)
BSDL content can be translated to CTL. Timing relationships (edge to edge, period, etc) can be specified. However completeness with respect to CTAG written requirements has to be checked.

(in response to Tom)
CTL can handle overlapping protocols. E.g. the example of the Jetta paper.

9:40am

Bulent pointed out that Rohit needs 4 months for everything except CTAG case. CTAG should schedule & provide an early example to help Rohit get done.

Yervant responded that CTAG needs to finish its spec first.

Lee indicated that CTAG is deciding if the standard will be the Scan-Pil + SIL. Sequential time estimate is 4 months to finish SIL + 4 months to finish scan Pil + docs

Ron expressed that the standard is taking too long and CTAG is running the danger of being made defunct by an in-term ad-hoc standard. Ctag needs to cut topics and work faster.

Yervant, Lee agree. Grady expressed concern that people are already working hard on a volunteer basis.

Yervant continued to suggest that the perfect standard is hard. Limit the scope but the SIL is not enough. Scan-Pil will make it widely used. So limit work to what can be done in 8 months and stop. Also milestones are needed to track and align progress

10am

Bulent stated that the SIL is almost done if parts (rising edge) are cut. It should not take 4 months more. He also fears that 8 months is too conservative with current process since it took ears for the SIL.

Lee pointed out that it is not a technical challenge but committee work tends to require consensus (thus 4 months)

Mike, Ron, Fidel, Yervant agree that there should be cuts.

Grady expressed that a good standard is important even if it takes more time than estimated.

10:15am

Bulent, Lee and Grady discussed how to change the process. Bulent took exception to the process of editing the documentation. Mike disagreed saying that the documentation process is sound. Fidel suggested to move on and postpone the process change topic until the end of the meeting.

10:30am

Mike gave an overview of the documentation task force status. Handouts are posted on web.

10:40

Rohit gave overview of compliancy status. Handout on the web. Main issue was how the rules should be expressed - in CTL or CTL & Text. Fidel suggested the latter was chosen.

Mike did not want a repeat/redefinition of rules already in the draft. Instead, just reference them. (all agreed)

He wanted clarification of the mandate to the compliancy task force. DATE audience suggested that it should be a reporting structure only.

11:05

Wrapper Models for TAM Interfacing (ref material on Web) (Grady)

Fidel left. Jason takes over minutes at 1:20pm CST

Grady is giving PIL proposal presentation.

Grady: Erik Jan objects to Model #1 because not able to execute test the same way regardless of access mechanism.

Model #1 is merely compliant, not our example of "Best Practice". Uses the user-provided coretest instruction.

Mike: questions need to review this at this meeting.

Grady: just looking for feedback from WG

Lee: This presents info relevant to determining schedule as Model #1 shows how parallel access is achieved without a PIL, only a SIL.

Rohit: Have we considered hierarchy.

Lee: Yes, we flatten hierarchy.

Lee: TAM is not part of the standard.

Rohit: Given Model #1, how do you differentiate between compliant and non-compliant cores.

Jason: We have a precise definition of what must be and what might not be wrapped. We only allow test only terminals to be un-wrapped.

Mike: Un-wrapped does not mean un-touched.

Jason: Un-touched does mean un-wrapped.

Rohit: CTL has no problem describing Model #1

Yervant: What bandwidth restrictions are there with Model #1

Lee: Model #1 has a 1 to 1 mapping through the wrapper, but no restriction on bandwidth on either side of the wrapper.

Lee: "Model #1 is an easier PIL to swallow."

Lee: We could stop here, with Model #1 and go to ballot with SIL only. The next phase would be to describe one or more standard PILs.

GG: TAMs have variable bandwidth therefore need bandwidth conversion.

Ron: Bandwidth conversion can be done inside TAM.

MikeR: Wants to have either Model 1 or Model 2, but not both. Just select one and we don't have anything to work on later.

GG: We have different definitions of PILs.

MikeR: We should cut that out of the standard.

GG: Then we would not have the benefit of tool automation. PIL indicates sequentiality. If we take it outside (to TAM) people can not derive benefit from the standard.

Lee: Agrees with Grady. This is the significant difference, no sequential element vs. sequential element in Model 1 vs. Model 2.

MikeR: Have seen PILs without sequential elements.

GG: Then call it some other dang thang (Texan, may not pass IEEE) instead of PIL

MikeR: Call it a SPIL.

Lee: Reduce task of WBR team to Model 1, which is supported by CTL. Then we could wrap this up. ;-)

Lee makes motion:

Discussion of motion:

Yervant: wrapper does not address bandwidth conversion.

Grady: concerned that we will not proceed to another release that does include bandwidth conversion.

Lee: we have always stated that we will include connecting to TAMs in our standard.

Vote:

Lee yes
Grady no
Luis yes
Jason yes
Ron yes
Alan yes
Mike yes
Tom left the building
Yervant yes
Bulent left the building
Rohit yes
Douglas abstain
Tony abstain
Fidel left the building

Motion passes.

Yervant: 4 months to the end?

Lee: that seems reasonable.

Lee: we need to better document Model #1 for CTL

WSO vs. WSOR

WSOR found to be non-compliant due to violation of timing independent operation, plug-and-play requirement.

Desire for rising edge behavior is valid for efficiency reasons.

Sharing of core terminals

What do we do with a signal which is also a chip pin?

GG: Do we have an access problem to these pins.

Alan: People may want to run the device on a low pin count tester.

Lee: Let's take this back to CTAG. I was confused this has to do with boundary scan cells.

Rohit: What characteristics of a core pin force it to go to chip pin?

Ron: It is an integral part of a hard core and cannot be separated.

Hierarchical cores in CTL

Rohit described the CTL syntax for hierarchical cores.

Plug and Play protocol for Wextest instruction.

Lee presented a minimal protocol for manipulating a wrapper.

Jason pointed out that it neglected the Transfer event.

Discussion ensued about the value of the transfer event that ultimately led to:

Lee provided a solution to using Transfer with the 1149.1 TAP controller.

Discussion as to the relevance of this solution commenced with the basic disagreement being if it should be included in the standard as example material. Mike R. being the foremost detractor.

Meeting adjourned