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The following individuals attended the meeting:
Neil Jacobson, Xilinx, chairperson Ken Parker, Agilent Brad Ishihara, Altera Sanjeev Sharma, Altera Howard Tang, Lattice Dave Bonnet, ASSET, vice-chairman Dan Gravitz, ASSET Mark Moyer, Lattice Jack Griffin, Cypress Doug Way, Alcatel Ray Dellecker, JTAG Technologies, interim secretary
Meeting of the IEEE 1532 Work Group
Feb. 20-21, 2001, at Altera, San Jose, CA
Status
BSDL Discussion Points:
1 4: Shift 4 bits out, does no compare, no CRC 2 4::CRC The 4 bits “A” come in on TDO, shift 4 bits out and add to CRC 3 4:*$XMASK Shift out 4 bits, mask against XMASK, no compare, no CRC (allowed by the syntax but not logical) 4 4:*$XMASK:CRC Shift out 4 bits, mask them with XMASK, the value 8 = A&D goes to CRC 5 4:*$XMASK?! Read XMASK from input, write XMASK (= “D”) to output, shift out 4 bits, mask them with XMASK, no compare, no CRC 6 4:*$XMASK?!:CRC Read XMASK from input, write XMASK (= “D”) to output, shift out 4 bits, mask them with XMASK, no compare, “8” = A&D goes to CRC 7 4:*!$XMASK Write masked raw data to output (8 = A&D), default “expected” value is all 0’s 8 4:*!$XMASK:CRC Write masked raw data to output (8 = A&D), default “expected” value is all 0’s, 8 to CRC 9 4:*!$XMASK?! Read XMASK from input, write XMASK to output, write masked raw data to output (8=A&D), default expected value is all 0’s 10 4:*!$XMASK?!:CRC Read XMASK from input, write XMASK to output, write masked raw data to output (8=A&D), default expected value is all 0’s, 8 = A&D to CRC 11 4:! Write raw TDO (A) to output 12 4:!:CRC Write raw TDO (A) to output, A to CRC 13 4:!*$XMASK Write raw TDO (A) to output, mask data with XMASK, ignore result 13a 4:!*$XMASK + 2 Write raw TDO (A) to output, increment XMASK by 2 (this operation can’t be optimized out because it affects future XMASK value), mask data with XMASK, ignore result 14 4:!*$XMASK:CRC Write raw TDO (A) to output, mask data with XMASK, ignore result, send 8 to the CRC 15 4:!*$XMASK?! Read XMASK from input, write raw TDO to output (A), write XMASK (D) to output, mask data with XMASK but ignore result 16 4:!*$XMASK?!:CRC Read XMASK from input, write raw TDO to output (A), write XMASK (D) to output, mask data with XMASK but ignore result, 8 (=A&D) to CRC 17 4:!*!$XMASK Write raw TDO (A) to output, write masked TDO (8=A&D) to output 18 4:!*!$XMASK:CRC Write raw TDO (A) to output, write masked TDO (8=A&D) to output, 8 to CRC 19 4:!*!$XMASK?! Read XMASK from input, write raw TDO (A) to output, write masked TDO (8=A&D) to output, write XMASK to output (D) 20 4:!*!$XMASK?!:CRC Read XMASK from input, write raw TDO (A) to output, write masked TDO (8=A&D) to output, write XMASK to output (D), 8 to CRC 21 4:$EXPECT Test A against 9, fails 22 4:$EXPECT:CRC Test A against 9, 3 (= A^9) to CRC 23 4:$EXPECT*$XMASK Test (A ^ 9)&D, fails 24 4:$EXPECT*$XMASK:CRC Test (A ^ 9)&D, fails, 1 (=A^9)&D to CRC 25 4:$EXPECT*$XMASK?! Read XMASK from input, test (A ^ 9)&D, fails, write XMASK (D) to output 26 4:$EXPECT*$XMASK?!:CRC Read XMASK from input, test (A ^ 9)&D, fails, write XMASK (D) to output,1 (=A^9)&D to CRC 27 4:$EXPECT*!$XMASK Write masked TDO (1 (=A^9)&D) to output, test (A^9)&D, fails 28 4:$EXPECT*!$XMASK:CRC Write masked TDO (1 (=A^9)&D) to output, test (A^9)&D, fails, (1 (=A^9)&D) to CRC 29 4:$EXPECT*!$XMASK?! Read XMASK from input, write masked compared TDO (1=(A ^ 9)&D) to output, write XMASK (D) to output, test (A^9)&D, fails 30 4:$EXPECT*!$XMASK?!:CRC Read XMASK from input, write masked compared TDO (1=(A ^ 9)&D) to output, write XMASK (D) to output, test (A^9)&D, fails, 1=(A^9)&D to CRC 31 4:$EXPECT?! Read EXPECT from input, test TDO (A) against EXPECT (9), fails, write 9 to output 32 4:$EXPECT?!:CRC Read EXPECT from input, test TDO (A) against EXPECT (9), fails, write 9 to output, 3 = A^9 to CRC 33 4:$EXPECT?!*$XMASK Read EXPECT from input, write EXPECT (9) to output, test (A^9)&D, fails 34 4:$EXPECT?!*$XMASK:CRC Read EXPECT from input, write EXPECT (9) to output, test (A^9)&D, fails, 1=(A^9)&D to CRC 35 4:$EXPECT?!*$XMASK?! Read EXPECT from input, read XMASK from input, write EXPECT (9) to output, write XMASK (D) to output, test (A^9)&D, fails 36 4:$EXPECT?!*$XMASK?!:CRC Read EXPECT from input, read XMASK from input, write EXPECT (9) to output, write XMASK (D) to output, test (A^9)&D, fails, 1=(A^9)&D to CRC 37 4:$EXPECT?!*!$XMASK Read EXPECT from input, write EXPECT (9) to output, write masked compared TDO (1=(A^9)&D) to output, test (A^9)&D, fails 38 4:$EXPECT?!*!$XMASK:CRC Read EXPECT from input, write EXPECT (9) to output, write masked compared TDO (1=(A^9)&D) to output, test (A^9)&D, fails, 1 = (A^9)&D to CRC 39 4:$EXPECT?!*!$XMASK?! Read EXPECT from input, read XMASK from input, write EXPECT (9) to output, write XMASK (D) to output, write masked compared TDO (1=(A^9)&D) to output, test (A^9)&D, fails 40 4:$EXPECT?!*!$XMASK?!:CRC Read EXPECT from input, read XMASK from input, write EXPECT (9) to output, write XMASK (D) to output, write masked compared TDO (1=(A^9)&D) to output, test (A^9)&D, fails, 1 = (A^9)&D to CRC 41 4:!$EXPECT?!*!$XMASK?!:CRC Read EXPECT from input, read XMASK from input, write raw TDO to output (A), write EXPECT (9) to output, write XMASK (D) to output, write masked compared TDO (1=(A^9)&D) to output, write XMASK (D) to output, test (A^9)&D, fails, 1 = (A^9)&D to CRC 42 4:!?!*!?!:CRC Read expected data from input, read ask data from input, write raw TDO to output (A), write expected data (9) to output, write masked compared TDO (1=(A^9)&D) to output, write mask data (D) to output, test (A^9)&D, fails, 1 = (A^9)&D to CRC 43 4:!$EXPECT+2!*!$XMASK>>1!:CRC Add 2 to EXPECT (B=9+2) from input, shift XMASK right 1 (6=D>>1), write raw TDO to output (A), write new EXPECT (B) to output, write masked compared TDO (0=(A^B)&6) to output, write new XMASK (6) to output, test (A^B)&6, passes, 0 = (A^B)&6 to CRC 44 4:!2!*!C!:CRC Write raw TDO to output (A), write expected data (2) to output, write masked compared TDO (0=(A^2)&C) to output, write mask data (C) to output, test (A^2)&C, passes, 0 = (A^2)&C to CRC
Additional rule: Only explicitly do a compare when a compare value is given, and the same with mask. If there is no expected data, it can’t fail. Multiple bangs result in comma-delimited data written out. (Decimal when it’s an operand, else hex.) The examples shown in the table will result in some syntax changes in Capture Field.
A logical flow was drawn to illustrate where we want to be able to capture date, and Ken prepared a modified syntax based on this discussion.
This would be a procedure called proc_preload. Would be used for devices that have CLAMP-like behavior, and if used, must be called before ISC is enabled. Recommended that this procedure be associated with ?, and it would be optional. A different preload could be used while in ISC mode, to provide sequencing as multiple parts begin to become operational. We are adding the keyword PRELOAD as a standard data name.
Attribute ISC_Fixed_System_Pins of PLD: entity is <fixed pin string>;
<fixed pin string> ::= “<fixed pin list>”
<fixed pin list> ::=<fixed pin>{, <fixed pin>}
<fixed pin> ::= <port ID> | <port name>
Refer to Fig 14. If the fixed pins don’t have ISC behavior, when the device is in ISC mode the fixed pins behave as though they are in bypass. Anything that’s not a fixed pin is treated as an ISC pin.
Review of the previously modified sections:
3.1.39 Using 2001 as the expected release date.
8.5.5.2 Allow other mechanism other than an unprocessed tag. Change “immediately” to “subsequently” for data following the ?! operators.
8.5.6.1 Two new mandatory procs:
proc_error_exit
and proc_program_done
must be supported by the tool. Try to concurrentize proc_done in all devices. In case of error, the process can either exit (in every device) or continue without programming the done bit. (Further discussed later in the meeting during BSDL review)
Add security example to proc_program.
8.5.7.2 Add HIGHZ and CLAMP to the instructions that other devices should be executing when another device is executing a proprietary instruction.
Allow either sequence, programming of security before or after programming of ISC_program_done.
A tool should not execute proprietary instructions, but this is not a rule.
Discussion of Next Steps > Ballot process begins with forming the ballot group, based on suggestions from the WG and the IEEE. There were 30 on the ballot last time. All have to be members of the IEEE Standards Association. Looking for a balance between vendors and users. 40-45 days after start to have an approved ballot group. > Letter will go out from Neil directing the ballot group to go the IEEE website and read the draft standard, and to make comments and cast their ballot there. Site stays live for 30 days. We will send out the hardware section (already standardized) and the new software section. 80% of the participants have to return ballots. Of the 80%, for approval must have 75% in favor. WG must respond to all of the comments and decide whether and how to respond to them. If there are significant changes, a re-ballot is customary. 10-30 day review period. > WG should submit names for candidates for this upcoming ballot. Neil will send out a list of who was on the hardware ballot. > Remaining action needed prior to ballot (with approximate dates):
Allowing time for going out for re-ballot, our target is to present 1532 for approval at the December 2001 meeting of the IEEE RevCom.
Next WG meeting, May 7 at Xilinx.
Discussion on new Demo Board:
Brad described the board that Altera is developing. Purpose is to assist tools vendors in development of multi-vendor concurrent programming (Altera, Lattice, Xilinx, Cypress). Can chain boards together but require individual power sources. Toggles allow devices to be switched out. 6 devices, 5 of them with a 7-segment display. Three of the devices are 1532 compliant, and 3 are 1532 compatible. All can be concurrently programmed, and also one of the Xilinx devices can be programmed from a Xilinx PROM (no LED display). TAP is a 10-pin header. 6-12 volt power jack creates two dc levels on the board, 2.5 and 3.3. Activity LEDs on-board for TDI, TDO, TMS, and TCK.
BSDL Review:
Based on files from Altera, Lattice, and Xilinx. Further discussion on how to handle error in any device during concurrent ISC. The tool user interface could allow: