Motion: Alan
Second: Mark
Vote: 7-0-0
Discussion: Compliance and Compatibility claims
Ken raised the issue.
There was much discussion of the requirement of the defined mandatory ISC instructions.
There was discussion of concurrentization.
There was much discussion of the vague meaning of compatible.
Motion: Add and ISC Design Warning to the BSDL file extension, which will include text information, and examples similar to Design Warning.
Motion: Brad
Second: Ken
Vote: 7-0-0
Discussion: Private Actions, Procedures?
Desire to address ability to facilitate New Innovation and Legacy parts.
Time: 12:30 PM - Lunch:
The working group thanks Agilent for its’ hospitality for hosting the meeting and providing lunches.
Time: 1:00 PM
Discussion: Continue Private Actions, Procedures?
Dialog:
- Don’t Use,
- Use w/o Concurrency/Optimization,
- Ok to Use in Concurrency/Optimization
Motion: Include a new key word called proprietary, to be included as part of the ISC action attribute optionally following the action name or the procedure name and documented in the ISC Design Warning.
Motion : Mark
Second: Sung
Vote: 7-0-0
The Proprietary key word provides the use the following chooses as minimum:
- Not Use,
- Use with no optimization,
- Use with Optimization.
The intention of the proprietary key word is to facilitate the description of New Innovation that can be described by the 1532 BSDL extensions and the programming of Legacy devices.
Action: Editor( Ken ) to provide acceptable wording for the specification.
Discussion: Review of changes to the p91-121_133-139.pdf
- Changes reviewed and issues identified for further discussion and resolution.
Action: Brad will create a data CRC and transmission CRC example using the JAM player to get the CRCs.
Time: 2:40 – break
Time: 2:50
Discussion: Open issues
- Use of ? and ! on both RHS and LHS – We defined syntax after much discussion.. Neil captured notation.
Time: 5:00 PM - Break for Day
Time: 6:00 PM to 9:00 PM - Dinner:
The working group would like to thank Agilent for dinner.
Date: 6-27-2000
Time: 9:00 AM
Discussion – Review of program examples.
Ken captured changes resulting from ? and ! syntax.
Discussion: Open Issues (continued)
- How do we reference data available in the BSDL file itself? (e.g., IDCODE) –
- How do we reference data in other files?
- No consensus was reached.
- ideas discussed were:
- Create additional file designators such as !1, !2…!n and ?1, ?2….?3 that would be associatated with a file. The file name could be derived from a system environment variable.
Discussion:
- Multiple repeat or initialize/repeat loops in flows.
- Keep with the single init/repeat/term flow
- Calculate CRC for device as CRC of CRC’s for flows
Motion: Add an Optional Action CRC to the data file.
Motion: Brad
Second: Dave
Vote: 6-1-0
Action: Neil to discuss with Bob Russel (EMC ) for a customer’s input on the implementation and use. Provide directions to editor.
Time: 11:15 - break
Discussion:
- p102, example 1 and 2, merging exercise to determine algorithm Keys: instruction count disparity( ISC_NOOPS), big delays, repeat loops, IR scan optimization, DR scans optimization, repeat count balancing(ISC_NOOPS, redistribution), IR padding( ISC_NOOPS),
Time: 12:00 – Lunch Break
Time: 12:45
Exercise:
Concurrent programming of erase action of vendor submitted BDSL files.
At proc level
- Always sync up enable and disable ( if appropriate)
- Use Bypass before and after disable instead of ISC_NOOP.
Unravel Erase Action:
M4032 7128 36XL PROCEDURES: proc_v_idcode proc_v_idcode proc_enable proc_enable proc_enable proc_erase proc_erase proc_erase proce_blank_check proc_disable proc_disable proc_disable INSTRUCTIONS: IR IDcode IDcode IDcode DR 32bits 32bits 32bits Wait 1 1 1 DR IR Enable Enable Enable DR 6bits Wait 1 Wait 1 Wait 1 IR Addr-shift DR 96bits Wait 1 Wait 1 IR Read Info Wait 1 Wait 1 DR 716bits IR erase erase erase DR 18 bits Wait 20-100ms 100ms 400ms <<<<<<< 18bits IR Addr-shift DR 96bits Wait 1 loop 94 times IR Read DR Wait 1 DR 76bits loop end IR Disable Disable Disable Wait 1 1ms 100us <<<<<<<
Unroll Proc_verify_idcode
M4032 7128 IR 1 1 DR Wait 1 1 DR 32bits 32bits IR Enable Enable DR Wait 1 1 IR AddrShift DR 96bits Wait 1 IR ReadInfo DR Wait 1 DR 716bits IR Erase Erase DR Wait 20-100ms 100ms <<<<<<< IR LscWaitInit AddrShift DR 96bits Wait 1 1 loop 80times 94times IR Program Program DR 200bits 716bits Wait 10-50ms 10ms ( 14 ) <<<<<<< loop end IR LscAddrInit AddrShift DR 96bits Wait 1 1 IR Read Read ( DR 1 of 14 Wait 1ms 1 ) <<<<<<< DR 200bits 216bits ( 13 of 14 from here) IR ProgDone AdddrShift DR 96bits Wait 10-50ms 1 IR Program DR 716bits Wait 10ms <<<<<<<
Read and Program alignment from above:
IR Read Program Skip RTI DRin 800bits X 716bits (2 of 14) RTI 10ms 10ms DRout 700bits Addr0 76bits X Skip RTI no incr DRin 200bits X 716bits (3 of 14) RTI 10ms incr 10 Addr1 DRout 200bits Addr1 716bits X Skip RTI no incr DRin 200bits X 716bits (4 of 14)
note: underline above indicates DR optimization.
Neil captured in excel spreadsheet program actions.
Open Issues:
- How do we reference data in other files.
- What if ISC_PROGRAM and ISC_READ target the same register?
- Do we need a register alias keyword?
- How do you write a file out using a “!” in a format that can be read back in using “?”.
Time: 3:30 PM
Adjourn meeting
Next Meetings:
August 17-18 GenRad, Westford MA
Secretary: Dennis Lia