Notes:
Many TBDs remain
Definitions are needed for many parameters
Section headings are needed to better explain the document flow.
The Application Guidelines need to be better organized
Should parameters that have only definitions be placed in "Definitions" section?
General formatting
Draft Recommended Practice for Electronic Power Subsystems: Parameters, Interfaces, Elements, and Performances
Developed By
Open Systems/Joint Task Force
Air Force Research Laboratory, Wright Patterson Air Force Base
Electronic Power Specification Standardization (insert IEEE header)
Abstract: The purposegoal of this Recommended Practice is to create avenues to expand the use of Commercial -Item P(CI) electronic power Electronics (CIPE) subsystems and the electronic building blockselements that form them. This document focuses on the definition and characterization of the interfaces between power electronic elements, Th includinge document defines the external interfaces to the electronics, their characterizing parameters, and some examples of the parameters’ performance (available and required to accommodate special applications). The examples of performance found in the Annexes will change The document is companion to IEEE P1515 Recommended Practice for Electronics Power Subsystems: Test Parameters, Test Methods and Test Condition. The information provided changes with the effects of new technologies and in response to input from users and manufacturers. Designers and integrators of power electronics can assess use thise information in to developing achieve cost effective performance.cost and performance effective products. Application Guidance is an experience data basedatabase provided to assist industry with power electronics system design and integration.
(Save for presentation materials
Providers Manufacturers of the power electronics can reference thise information document to publish expanded accommodating standardized supplemental data. Integrators of special applications can use this data to select CIPE products, thus thus promoting expanding the usage of CIPE electronics. ) Availability of such data/information would benefit both the industry and the government.
Maintained By
TRW Dayton Avionics Engineering Center
Ed Mabe 937-259-4985
Replace with IEEE banner
Maintained By
TRW Dayton Avionics Engineering Center
Ed Mabe 937-259-4985
Air Force Research Laboratory, Wright Patterson Air Force Base
Marvin Soraya 937-255-4709 Ext. 4177
Introduction
Recommended Practice IEEE Std. 1573-200x is a system level document providing interface definitions and application guidance, which includes some characterizing parameters for power electronics subsystems. This is a companion document to IEEE Std. 1515-2000 (Recommended Practice for Electronic Power Subsystems Parameter Definitions, Test Methods and Test Conditions). It also focuses on the definition and characterization of the interfaces between power electronic elements, including some examples of performance required to accommodate special applications. The Electronic Power Specification Standardization (EPSS) activity is sponsored by the Open System Joint Task Force (OS-JTF) from the Office of the Secretary of Defense. The goal is to reduce system acquisition costs by expanding and enhancing the use of Commercial-Item (CI) resources (products, services, processes, and/or piece parts). EPSS members are drawn from industry (defense and commercial users and manufacturers) and academia. EPSS documents are driven by and are based on industry consensus.
Use of this document
Thise document above structure complements the structure provided by IEEE P1515 (Recommended Practice for Electronic Power Subsystems). Availability and use of these Recommended Practices are intended to benefit the industry (commercial, defense) and the government. Specifically, the use of the Recommended Practices would:
Working Group members are from industry (defense and commercial users and manufacturers) and academia. EPSS documents are driven by and are based on industry consensus. Volunteers from both user and manufacturer communities are developing the Recommended Practice. The data is dynamic (NOTE: this implies frequent updating of the standard after the release of Version 1), responding to technology changes and to the input from users and manufacturers.
Table of Contents
1. Overview *
1.1 Scope.
*1.2 Purpose.
*1.3 Organization of the recommended practice
*2. References
*3. Definition of terms and acronyms
*3.1 Acronyms
*3.2 Terms
*4. Power System Architecture - Joe Ortiz/Rich Buck
*4.1 System Element and Architecture Definition move to Power System Architecture - Ernie Parker
*5. Interface Definition - Yan-Fei Liu/ Rick Eddins
*5.1 Electrical Interface.
*5.2 Mechanical Interface
*5.3 Environmental Interface
*5.4 System Effectiveness
*6. Electrical Interface Parameters
*6.1 EMC - Ernest Fierheller
*6.2 Stability
*6.3 Voltage and current
*6.4 Supervisory and control – David Cooper
*6.5 Protection - Carlos Gonzalez
*7. Mechanical Interface
*7.1 Thermal Interface M/D - Harry Lamberth
*7.2 Packaging M/D - David Berry
*8. Environmental
*8.1 Resistance to materials Env/D/M/C - George Schoneman
*8.2 Sand and Dust (corrosion, filters) Env/D/M/C - George Schoneman
*8.3 Explosive Atmosphere Env/D/M/C- George Schoneman
*8.4 Acoustic Susceptibility Env/D/M/C- George Schoneman
*8.5 Acoustic Emissions/Audible Noise (need to include human factors issues) Env/D/M/C- George Schoneman
*8.6 Radiation Env/D/ reference other sources for testing- Christian Lazarovici
*9. System Effectiveness
*9.1 Product Life SE/D/M/C – David Cooper/ Ernie Parker
*9.2 Compliance Information, e.g., Agency Approvals
*9.3 Component Quality
*9.4 Derating app guideline
*9.5 Quality Assurance (was Control) change table 6 item 8
*9.6 Configuration Management
*9.7 Warranty
*9.8 Test Equipment Calibration and Standards application guide
*9.9 Product Obsolescence vs discontinuance
*9.10 Qualification Requirements
*9.11 Production line final test
*9.12 Acceptance Testing
*9.13 Screening
*10. System Integration & Adaptation
*10.1 System interaction – write as a general guideline - Ernie Parker/David Cooper
*10.2 Supervisory Monitoring and Control and Software Implementation – David Cooper
*10.3 Adaptation
*10.4 Case Studies, Examples
*Annex A: Performance
*Annex B: Parameter Index
*1. Overview 5
1.1 Scope. 5
1.2 Purpose. 5
1.3 Organization of Practice 5
2. References 6
3. Definition of Terms and Acronyms 6
3.1 Acronyms 6
3.2 Terms 8
4. Electrical Interface 10
4.1 EMC 12
4.2 Stability 12
4.3 Voltage and current 13
4.4 Supervisory and control 13
4.5 Protection 13
4.6 14
5. Mechanical Interface 14
5.1 Thermal Interface M/D 14
5.2 Packaging M/D 15
5.3 16
6. Environmental 16
6.1 Resistance to materials Env/D/M/C 16
6.2 Sand and Dust (corrosion, filters) Env/D/M/C 16
6.3 Explosive Atmosphere Env/D/M/C 16
6.4 Acoustic Susceptibility Env/D/M/C 16
6.5 Acoustic Emissions/Audible Noise (need to include human factors issues) Env/D/M/C 16
6.6 Radiation Env/D/ reference other sources for testing 17
7. System Effectiveness 17
7.1 Product Life SE/D/M/C 17
8. Application Guidance 17
8.1 System Element and Architecture Definition 17
8.2 System interaction – write as a general guideline 19
8.3 Supervisory Monitoring and Control and Software Implementation 21
8.4 Accommodation 22
8.5 Input 23
8.6 Output 24
9. Annex 1: Performance 25
10. Annex 2: Parameter Index 42
1. Overview
1.1 Scope.
1.2 Purpose.
1.3 Organization of Practice
2. References
3. Definition of Acronyms and Abbreviations; Entities, Attributes, Parameters; and Terms
3.1 Acronyms and Abbreviations
3.2 Definitions of Power Electronics System (PELS) Interface Entities, Attributes, and Parameters
3.3 Definition of Terms 12
4. Interfaces: Definitions, Test Methods, Test Conditions TBD 14
5. Application Guidance 15
5.1 System Element and Architecture Definition 15
5.2 System interaction – write as a general guideline 17
5.3 Supervisory Monitoring and Control and Software Implementation 19
5.4 Accommodation 20
5.5 Input 21
5.6 Output 21
6. Annex 1: Performance 23
7. Annex 2: Parameter Index 40
1. Overview 2
1.1 Scope. 2
1.2 Purpose. 2
1.3 Organization of Practice 2
2. References 2
3. Definition of Acronyms and Abbreviations; Entities, Attributes, Parameters; and Terms 2
3.1 Acronyms and Abbreviations 2
3.2 Definitions of Power Electronics System (PELS) Interface Entities, Attributes, and Parameters 2
3.3 Definition of Terms 2
4. Interfaces: Definitions, Test Methods, Test Conditions TBD 2
5. Application Guidance 2
5.1 System Element and Architecture Definition 2
5.2 System interaction – write as a general guideline 2
5.3 Supervisory Monitoring and Control and Software Implementation 2
5.4 Accommodation 2
5.5 Input 2
5.6 Output 2
6. Annex 1: Performance 2
7. Annex 2: Parameter Index 2
1. Overview 4
1.1 Scope. 4
1.2 Purpose. 4
1.3 Organization of Practice 5
2. References 5
3. Definition of Terms, Acronyms and Abbreviations 5
3.1 Definition of terms 5
3.2 Acronyms and Abbreviations 7
4. Power Sub-System Interface Parameters 9
4.1 General Power Sub-System Interface Parameters 9
4.2 Electrical Output/Load System Interface 10
4.3 Electrical Source System Interface Parameters 11
4.4 Mechanical System Interface Parameters 11
4.5 Environment System Interface Parameters 14
4.6 System Effectiveness Interface Parameters 14
5. Performance 15
6. Application Guidance 16
6.1 System Element Usage 16
6.2 Architectures 18
6.3 Economic 18
6.4 System interaction – write as a general guideline 18
6.5 Accommodation 22
6.6 Output Noise 22
7. ANNEXES 24
7.1 Performance 24
7.2 Parameter Index 41
Table of Contents
1. Overview 1
1.1 Scope. 1
1.2 Purpose. 1
1.3 Organization of Practice 2
2. References 2
3. Definition of Terms, Acronyms and Abbreviations 2
3.1 Definition of terms 2
3.1.1 Commercial Off-The-Shelf (COTS) (from Ensuring Successful …) 2
3.1.2 Commercial Component (from FAR) 3
3.1.3 Commercial Item (excerpted from FAR) 3
3.2 Acronyms and Abbreviations 4
4. Power Sub-System Interface Parameters 6
4.1 General Power Sub-System Interface Parameters 6
4.1.1 Contact Resistance NOTE: Consider Hot Swap ie. max interrupt current vs. max current 6
4.1.2 ESD 7
4.1.3 Status Monitoring 7
4.1.3 Supervisory Control 7
4.1.4 7
4.2 Electrical Output/Load System Interface 8
4.2.1 Regulation, Combined 8
4.2.2 Regulation effects due to aging 8
4.2.3 Set point voltage accuracy 8
4.2.4 Power Density 8
4.2.5 Switching Frequency Variability 8
4.2.6 Synchronization of elements 9
4.2.7 Noise spectrum – EMI 9
4.2.8 Low Voltage Protection 9
4.2.9 Overcurrent characteristics 9
4.2.10 Overtemperature shutdown 9
4.3 Electrical Source System Interface Parameters 9
4.3.1 Reverse Polarity Protection 9
4.4 Mechanical System Interface Parameters 9
4.4.1 Thermal Interface Type – simple definition of type 9
4.4.2 Cooling Provision 9
4.4.3 Conduction Cooling 10
4.4.4 Convection Cooling 10
4.4.5 Airflow 10
4.4.6 Pressure drop/back pressure 10
4.4.7 Temperature Rise 10
4.4.8 Maximum Inlet Temperature 10
4.4.9 Liquid Cooling (closed system) 10
4.4.10 (Heat Pipe) – phase change TBD review table 10
4.4.11 Flow rate 10
4.4.12 Pressure drop 10
4.4.13 Cooling Medium 10
4.4.14 Maximum Power Dissipation 10
4.4.15 Packaging 10
4.4.16 Component 11
4.4.17 Card or Printed Wiring Assembly 11
4.4.18 Card or Printed Wiring Assembly 11
4.4.19 Box 11
4.4.20 Electrical Terminations (for components/PWAs/ Boxes) 11
4.4.21 11
4.4.22 Physical Characteristics fix tableTBD 11
4.4.23 Center of Gravity(CG) 12
4.5 Environment System Interface Parameters 12
4.5.1 Resistance to materials (jet fuel, hydraulic fluid, de-icer, gases, corrosive agents) 12
4.5.2 Sand and dust 12
4.5.3 Explosive atmosphere 12
4.5.4 Combined effects (Many Environments @ once) 12
4.5.5 Acoustic Susceptibility 12
4.5.6 Acoustic Emissions/ audible noise. 12
4.5.7 Radiation 12
4.6 System Effectiveness Interface Parameters 12
4.6.1 Compliance Information, e.g., Agency Approvals 12
4.6.2 Product Life 13
4.6.3 Component Quality 13
4.6.4 Derating 13
4.6.5 Quality Control 13
4.6.6 Configuration Management 13
4.6.7 Warranty TBD what is diff between waranty and guarantee 13
4.6.8 Test Equipment Calibration and Standards 13
4.6.9 Product Obsolescence 14
4.6.10 Qualification Process 14
4.6.11 Production line final test 14
4.6.12 Acceptance Testing 14
5. Interfaces 14
6. Performance 14
6.1 Electrical Performance. 14
6.2 Mechanical Interface 14
6.3 Environmental Interface Performance 14
6.4 System Effectiveness Performance 14
7. Application Guidance 15
7.1
System Element Usage 157.2 Architectures 16
7.3 Economic 16
7.4 System interaction – write as a general guideline 16
7.4.1 Stability - Includes Regulation parameters 16
7.4.2 Redundancy methods 16
7.4.3 Current Sharing Methods: Application Guideline 16
7.4.4 Thermal issues 17
7.4.4 Grounding issues 17
7.4.5 17
7.4.6 Sensing 17
7.4.7 Supervisory Monitoring and Control 17
7.4.8 EMC 18
7.4.9 Physical Environment (Mechanicals) – shock, vibration, structural 18
7.5 Accommodation 18
7.5.1 heat shielding 19
7.5.2 directing cooling air 19
7.5.3 designing shock absorbers into the mounting 19
7.5.4 transients 19
7.5.5 software/firmware 19
7.5.6 others 19
8. Switching Frequency Stability move to section 7.4.4 TBD 19
8.1 Introduction 19
8.2 Fixed Frequency 19
8.3 Variable Frequency 20
8.4 The impact of switching frequency stability on EMI 20
8.5 Output Noise 20
8.6 21
9. ANNEX Parameter Index 21
Figures
Figure 1. Power Subsystem Interfaces *
Figure 2. Power Element Interfaces Indicating Accomodation *
Figure 1 Power Subsystem Interfaces 2
Figure 1 Power Subsystem Interfaces 6
Figure 1 Power Element Interfaces indicating Accomodation 17
Figure 1 Power Subsystem Interfaces Error! Bookmark not defined.
Tables
Table 1 General Electrical Interface Performance *
Table 2 Electrical Interface: Output/Load Performance *
Table 3 Electrical Interface Source Performance *
Table 4 Mechanical Interface Performance *
Table 5 Environmental Interface Performance *
Table 6 System Effectiveness Interface Performance *
Table 7 General Electrical Interface Parameters *
Table 8 Electrical Output/Load System Interface *
Table 9 Electrical Source System Interface Parameters *
Table 10 Environment System Interface Parameters *
Table 11 System Effectiveness Interface Parameters *
Table 1 General Electrical Interface Performance 23
Table 2 Electrical Interface: Output/Load Performance 25
Table 3 Electrical Interface Source Performance 28
Table 4 Mechanical Interface Performance 30
Table 5 Environmental Interface Performance 34
Table 6 System Effectiveness Interface Performance 38
Table 7 General Electrical Interface Parameters 40
Table 8 Electrical Output/Load System Interface 40
Table 9 Electrical Source System Interface Parameters 41
Table 10 Environment System Interface Parameters 43
Table 11 System Effectiveness Interface Parameters 43
Table 1 GENERAL ELECTRICAL INTERFACE Performance 2
Table 2 Electrical Interface: Output/Load Performance 2
Table 3 Electrical Interface Source Performance 2
Table 4 Mechanical Interface Performance 2
Table 5 Environment Interface Performance 2
Table 6 System Effectiveness Interface Performance 2
Table 7 General System Interface Parameters 2
Table 8 Electrical Output/Load System Interface 2
Table 9 Electrical Source System Interface Parameters 2
Table 10 Environment System Interface Parameters 2
Table 11 System Effectiveness Interface Parameters 2
Table 1 General Interface Performance 24
Table 2 Electrical Interface: Output/Load Performance 26
Table 3 Electrical Interface Source Performance 29
Table 4 Mechanical Interface Performance 31
Table 5 Environment Interface Performance 35
Table 6 System Effectiveness Interface Performance 39
Table 7 General System Interface Parameters 41
Table 8 Electrical Output/Load System Interface 41
Table 9 Electrical Source System Interface Parameters 42
Table 10 Environment System Interface Parameters 44
Table 11 System Effectiveness Interface Parameters 44
Table 1 Acronyms and Abbreviations Error! Bookmark not defined.
Table 2 General Interface Performance 14
Table 3 Electrical Interface: Output/Load Performance 14
Table 4 Electrical Interface Source Performance 14
Table 5 Mechanical Interface Performance 14
Table 6 Environment Interface Performance 14
Table 7 System Effectiveness Interface Performance 14
The Recommended Practice for Electronic Power Subsystems: Parameters, Interfaces, Elements, and Performances is intended for designers, integrators and manufacturers of power electronics. This document provides interface definitions and application guidance, including parametric values characterization for power electronics subsystems consisting of single or multiple elements. Only supervisory monitoring and control software is mentioned.
The Recommended Practice applies to ac-dc and dc-dc electronic power subsystems. The range of power subsystems includes dc, single phase, and three-phase inputs, with elements having power levels from a fraction of a watt to 20 kW. The voltage range is 600 V and below, at a frequency or frequencies of dc -1 kHz. The recommended practice may be used outside the range where applicable.
From PAR: There are no defined interfaces for power electronic subsystems. The Recommended Practice is intended for designers, integrators and manufacturers of power electronics. This document provides interface definitions and application guidance, including parametric values for power electronic subsystems consisting of single or multiple elements.
The purpose of this Recommended Practice is to creates avenues to expand the use of Commercial Item Power Electronics (CIPE) and the elements that form them.
There are no defined interfaces for power electronic subsystems. The Recommended Practice is intended for designers, integrators and manufacturers of power electronics subsystems to exchange unambiguous data.
(need to fix clause numbers, and then refer to them in numerical order)
Interfaces are defined in Clause 3.6.6. Annex B indicates the location of the description of all parameters addressed by this document, IEEE Std. 1515 - 2000 or within this document. NOTE: Insert as clause after purpose. Parts of the following need to be placed in a "Document Overview" or "How to Use this Document" clause. Parameters relating to each of the interfaces are listed in Tables 1 through 6. Each parameter is defined in Clause 6. Annex A Clause 7 provides columns indicating performance levels "Commonly Available" (from manufacturer’s catalog items) and. Clause 7 also includes a an "Extraordinary Requirements" column listing the performance levels needed in current militarysome highly demanding applications. This allows the designers to use the Recommended Practice to determine (perform trade-off analyses) the extent that CIPE products may be used toin configureing a particular electronic power electronic subsystem. Clause 5 provides Application Guidance for some aspects of power electronic subsystems.
Software used to implement internal functions within a power element is not considered in this document, since it is part of the black-box performance. However, software which directly affects the performance of an interface between elements (for example, a control or monitoring interface) must be considered as part of the interface. This is discussed more fully in section 5.3.1.
[1] IEEE Std. P1515 - 2000, Recommended Practice for Electronic Power Subsystems: Parameter Definitions, Test Conditions, and Test Methods
[2]
Federal Acquisition Regulations (FAR), Part 2 Definitions of Words and Terms, (FAC 97-17), 25 April 2000
[3] United States Air Force Scientific Advisory Board, Report on Ensuring Successful Implementation of Commercial Items in Air Force Systems, SAB-TR-99-03, April 2000
Editors note: Consider combining terms and acronyms number each individually. See 1515 and Abbreviations
A Ampere
aAc Alternating Current
ATP Acceptance Test Plan
BABT British Approvals Board for Telecommunications (Certification Company)
BIT Built In Test
BW Bandwidth
° C Degrees Centigrade
CE European Union Conformity Mark (European Commission)
CG Center of Gravity
CI Commercial Item
CM Common Mode
COTS Commercial-Off-The-Shelf (equivalent to CI)
CSA Canadian Standards Association
dc Direct Current
di/dt Rate of Current Change
DIN Deutsches Institut fur Normung (German Standards Institute)
DIP Dual In-Line Pins
DM Differential Mode
EMC Electromagnetic Compatibility
EMI Electrom Magnetic Interference
EPSS Electronic Power Specification Standardization
ESD Electros Static Discharge
ESS Environmental Stress Screening
ET Elapsed Time
FAR Federal Acquisition Regulations
FCC Federal Communications Commission
FIT Failure in Time
GIDEP Government-Industry Data Exchange Program
HALT Highly Accelerated Life Test
HIRF Highly Intensified Radio Frequency
Hz Hertz
I Current
IAW either delete or identify
I/F Interface
I/V Current/Voltage
ID Identify
IEC International Electrotechnical Commission
IEEE Institute of Electrical and Electronics Engineers
Iin Input Current
ISA Industry Standard Architecture Bus
ISO International Organization for Standardization
JEDEC Joint Electron Device Engineering Council
kHz Kilohertz
LFM Linear Feet/Minute
MHz Megahertz
ms Milliseconds
MSDS Material Safety Data Sheet
MTBF Mean Time Between Failures
NA Not Applicable
nom Nominal
OSJTF Open Systems/Joint Task Force
PCMCIA Personal Computer Memory Card International Association
p-p Peak to Peak
ppm parts per million
PSI Pounds per square inch/In2
PWA Printed Wiring Assembly
PWM Pulse Width Modulation
QPL Qualified Parts List
RF Radio Frequency
SAM Standard Aerospace Module
SEM Standard Electronic Module
SIP Single In-Line Pins
SPC Statistical Process Control
STP Standard Temperature and Pressure
TBD To Be Determined delete?
TCE Temperature Coefficient
TUV TÜV Rheinland (Certification Company)
U Eurostandard height unit approximately 1.75"
UL Underwriters Laboratory
usec Microsecond
V Volt
Vac ac Volts
Vdc dc Volts
VDE Verband Der Elektrotechnik (The Association for Electrical, Electronic & Information Technologies)
Vin Input Voltage
VME Versa Module Europa
Vout Output Voltage
WVout WattsOutput Voltage
Zin Input Impedance
Zload Load Impedance
ZouW Output ImpedanceWatts
ZCS Zero Current Switching
ZVS Zero Voltage Switching
The resistance found between two mating surfaces is generally determined by the surface contact area, pressure between the two mating surfaces, and the materials used for the contacts.
Apply a current equal to the mated rating of the connecting feature (pin, screw terminal, bus bar) and measure the voltage drop across the junction of the connection. The value obtained by dividing the measured voltage drop by the current applied represents the contact resistance.
NOTE: Add detail about connector types. Thermal considerations such as ambient temperature, heating. Number of mating cycles
Electrostatic Discharge is the sudden occurrence of current flow where a difference in dc voltage is equalized by a flow of charge between two electrically isolated bodies. This equalization is characterized by a rapid current flow that may also involve an arc discharge between what is primarily the capacitively stored charge on one or all involved bodies so that the voltage on the mutual bodies is essentially equal after the current flow.
ESD control is the process of minimizing possibility of the adverse occurrence of a rapid charge transfer. NOTE save for application guideline. Harry
Electrostatic Discharge. A phenomenon created in low humidity environments where an object collects an excess amount of charge. When this object comes within close proximity to an object of oppositely charged particles, the charge will transfer to the oppositely charged object, sometimes creating a spark. With or without a spark, this transfer of electrons has been shown to degrade, damage, or destroy electronic circuitry.
Test Method: Varying voltage levels are general stored in a fixed capacitance and then applied through a fixed impedance. All externally accessible electrical interfaces to the unit should be tested IAW the intended environment. Look into definitions provided through MIL STD’s.
Definition
The capability to detect that key parameters of the power system are within pre-determined limits, and provide an indication if one or more of the monitored parameters is outside the pre-determined limits. This capability may also provide an indication if a failure is detected in a sub-system or module within the power system even if the performance parameters remain within the predetermined limits.
Definition
The capability to allow alteration of the power system state through local or remote control interface to meet overall performance objectives. Examples include remote resetting of protection circuits, remote on-off capability of system components, alteration of output voltage and/or current settings, etc.
4.1.4.2 BIT per P1515 (TBD not defined in P1515, add definition herefind the correct location)
Electrical Output/Load System Interface
Definition
The sum of the effects of line, load and temperature regulation as defined in (P1515, sections ra. TBD4.4.1, 4.4.2, and 4.4.3 respectively).
Definition
Degradation in combined regulation due to life or long term effects.
The maximum deviation from a specified voltage under defined operating conditions. The accuracy is commonly expressed as a percentage deviation from the specified voltage.
Definition
The ratio of total rated output power to power subsystem volume, including all interface requirements imposed by the identified power subsystem. This normally includes EMI filters and heat exchanger volume. A given electronic power sub-system can have different power density ratings in different applications.
The range of switching frequencies over which normal operation can occur.
NOTE: (discussion) Users must be aware that switching converter switching frequency must be understood. The system designer must address frequencies that are of concern to the application.
Measure the switching frequency by way of the input and output ripples’ fundamental frequency(see P1515 para. TBD).
Definition
Operation of power electronic elements at a common frequency or multiple of a common frequency; achieved via a synchronization signal between modules and / or an external interface.
Low voltage protection can be the function of a component or circuit in a power subsystem designed to sense and provide protection against either an input or output voltage that is below the level of normal or safe operation by reducing the subsystem operating stress or shutdown. This abnornal condition is usually reported by the subsystem as a failure to a monitoring system.
Overcurrent characteristics are the features of multiple overload conditions in a power subsystem that can be caused or influenced by events such as worst case load changes, unstable output voltage regulation, or external/internal short circuits which force the subsystem to draw an excessive deviation of the defined operating current limits.
Definition
A function which causes the power system to automatically shut itself down if the temperature at a pre-determined monitoring point exceeds a pre-set threshold.
Electrical Source System Interface Parameters
Definition
The capability of a power element to withstand, without damage, the continuous application of a DC voltage when the positive and negative connections are interchanged.
TBD move to application : Reverse Polarity Protection: Ability of a Power Electronic Subsystem to withstand without damage the application of input and/or output power connections in reverse order. Usually implemented via either shunt or series protection devices. Shunt protection will typically present low impedance to the source, which may draw current sufficient to trip external protection devices, and series protection will typically present high impedance to the source approximating an open circuit.
Mechanical System Interface Parameters
Definition.
Per P1515, 5.4.7 (Cooling Requirements).
Definition.
Definition.
Definition.
Definition
The increase in temperature at the point of interest when the power system is in operation as compared to the temperature at the same point when the power system is not operating (and has been shut down for a long enough time to fully cool down). Normally the temperature rise is measured after the power system has been in operation long enough to reach thermal equilibrium.
Definition
The maximum allowable temperature of the cooling medium, at the point where it enters the power system, required to maintain the power system elements within their safe operating temperature range.
Definition.
A liquid or gas used as a heat transfer material in a heat flow path.
TBD The amount of power that will be dissipated by the power subsystem under the combined specified conditions.
Physical characteristics of the subsystem. ( NOTE: add to table if not already included: physical dimensions, materials, potting, sealing, etc described by dimensional drawings, identification of connectors, thermal performance data, and generic package identification.)
NOTE: The distinction between Component, Card/PWA, and Box is made in this document to facilitate definitions of electrical and mechanical interface parameters for various levels of power electronic subsystems.
Definition
A single low level replaceable circuit element. Card or Printed Wiring Assembly
Definition
A power electronic element consisting of a single card or printed wiring assembly (PWA) which may include "daughter" cards. Cards may consist of individual passive and active electronic components and / or power electronic subsystem components such as DC-DC converters.
Definition
A power electronic element consisting of multiple Cards or PWAs and/or other assemblies within an enclosed housing. Such elements may be a replaceable part of a larger assembly or a standalone unit.
Definition
Physical attachments to achieve electrical interface connections.
Definition.
Generally used in a specification sense where two or more critical parameters are considered to be acting on a power electronic element so as to influence performance.
Commercial item means --
(a) Any item, other than real property, that is of a type customarily used for non-governmental purposes and that --
(1) Has been sold, leased, or licensed to the general public; or,
(2) Has been offered for sale, lease, or license to the general public;
(b) Any item that evolved from an item described in paragraph (a) of this definition through advances in technology or performance and that is not yet available in the commercial marketplace, but will be available in the commercial marketplace in time to satisfy the delivery requirements under a Government solicitation;
(c) Any item that would satisfy a criterion expressed in paragraphs (a) or (b) of this definition, but for --
(1) Modifications of a type customarily available in the commercial marketplace; or
(2) Minor modifications of a type not customarily available in the commercial marketplace made to meet Federal Government requirements….
Any component that is a commercial item.
Items which can be purchased through commercial retail or wholesale distributors, as is, and are generally available as a catalog item.Interfaces
The electronic power elements can be modeled as "black boxes" whose contents are unknown. Four element power subsystem interfaces are identified: Electrical, Mechanical, Environmental, and System Effectiveness.. By specifying the interface parameter’s performance ranges, it can be determined whether a particular element is suitable for an application or a particluar application’s requirements can be determined. See Figure 1, Power Sub-System Interfaces. TBD expand this


Figure 1. Power Subsystem InterfacesFigure 1
Elements are defined as physically realizable building blocks of an electronic power subsystem. Elements may be realized in a variety of packages such as components, cards, or boxassemblies.
Editorial Note. Ideally, they are commercially available products, in current high volume manufacture for multiple applications, and conforming to defined, non-proprietary, industry standard interfaces.
Intro paragraph: How doc will assist the reader
Definition/description of power subsystem
Add diagram of power system architecture hierarchical diagram
System architecture examples medical, telecom, automotive, avionics
It is beyond the scope or the intent of this document to discuss or dictate the internal aspects of these elements or to specify the manner in which they are assembled to create a power electronics sub-system. There are, however, considerations in applying these elements that can facilitate the match of commercially available elements to application requirements and the successful implementation of a power electronic sub-system that consists of an interconnection of multiple elements. These considerations fall in the categories of requirement definition, architectural considerations, and system interaction.
Requirement definition, at each level in the power sub-system’s development, is perhaps the most crucial and potentially limiting task in the evolution toward development of the end product. This document is intended to reduce that limitation by providing common terminology and definitions for sub-system parameters and by quantifying typically required, and more importantly, typically available values for these parameters. Caution, however, is urged in the use of these quantified parameters. At their extremes they represent current state-of-the-art product on the commercial market at a particular element level. Sub-system products defined by combinations of these values may neither be available with current element products or economically achievable. Values such as power density or reliability available with low level building block elements will generally have to be relaxed for sub-systems built with combinations of these and other elements. Guidelines for successful requirement definition include leaving interface parameter definitions as loosely defined as practical and involving manufacturers of building block elements under consideration in trade-off decisions during the requirement definition process.

Figure 2. Power Element Interfaces Indicating Accomodation
Architectural considerations are also key to successful electronic power sub-system definition. The primary sub-system and building block element interfaces, as defined in this document, are electrical, mechanical, environmental, and system effectiveness. One or more of these interfaces may not ideally map from an application’s required interface to the element’s available interface. Mapping between these interface requirements may be possible with specific architectural arrangements of available elements and or by providing additional circuitry or buffering between system and element interfaces. The interface architecture model Error! Reference source not found. depicts these architectural considerations. Examples of methods for mapping required interfaces to available elements are depicted for each of the defined interfaces.
Architectures that facilitate the use of available products – insert architecture diagram, target high volume industry to map to a general architecture (automotive, telecom)
Interfaces between elements and at higher subsystem levels.
replace the following paragraph
Power electronics elements can be modeled as "black boxes" whose contents are unknown. Four element interfaces are identified: Electrical, Mechanical, Environmental, and System Effectiveness. By specifying the interface parameter’s performance ranges, it can be determined whether a particular element is suitable for an application or a particluar application’s requirements can be determined. See
Modify drawing , element in middle, remove buffering boxes

Figure 3
The electrical interface is bounded by the input voltage and the output voltage. There may be control signals or test points which need to be addressed. There can be various configurations within this boundary whose internal interfaces are unknown. Several "building blocks" can be connected together with one blocks’ output connected to the next blocks’ input. Blocks may be components or cards. Table 1, Table 2 and Table 3 describe electrical performance.
The mechanical interface includes size, mounting methods, thermal requirements, external connections, etc.
There are several conditions to consider for environmental Performance. The operating and non-operating environments have to be defined. There may be several different environments within one platform such as wing pylons vs. cockpits of fighter aircraft. Performance may also be life expectancy oriented or simply robustness indicators. Add other I/F table headers rewrite
System Effectiveness Performance is concerned with reliability and maintainability.
Use this figure in section 10 adaptation section

Figure 1. Power Subsystem Interfaces
mention source and load impedance
Electrostatic Discharge is the sudden occurrence of current flow where a difference in dc voltage is equalized by a flow of charge between two electrically isolated bodies. This equalization is characterized by a rapid current flow that may also involve an arc discharge between what is primarily the capacitively stored charge on one or all involved bodies so that the voltage on the mutual bodies is essentially equal after the current flow.
ESD control is the process of minimizing possibility of the adverse occurrence of a rapid charge transfer. NOTE save for application guideline. Harry
Definition Alternative 2
Electrostatic Discharge. A phenomenon created in low humidity environments where an object collects an excess amount of charge. When this object comes within close proximity to an object of oppositely charged particles, the charge will transfer to the oppositely charged object, sometimes creating a spark. With or without a spark, this transfer of electrons has been shown to degrade, damage, or destroy electronic circuitry.
Varying voltage levels are general stored in a fixed capacitance and then applied through a fixed impedance. All externally accessible electrical interfaces to the unit should be tested in accordance withIAW the intended environment. Look into definitions provided through MIL STD’s.
The sum of the effects of line, load and temperature regulation as defined in P1515, sections 4.4.1, 4.4.2, and 4.4.3 respectively.
Degradation in combined regulation due to life or long term effects.
The range of switching frequencies over which normal operation can occur.
NOTE: (discussion) Users must be aware that switching converter switching frequency must be understood. The system designer must address frequencies that are of concern to the application.
Measure the switching frequency by way of the input and output ripples’ fundamental (TBD switching frequency is referenced in P1515) frequency (see P1515 Ripple and Spikes Section 4.5).
TBD The amount of power that will be dissipated by the power subsystem under the combined specified conditions.
The resistance found between two mating surfaces is generally determined by the surface contact area, pressure between the two mating surfaces, and the materials used for the contacts.
Apply a current equal to the mated rating of the connecting feature (pin, screw terminal, bus bar) and measure the voltage drop across the junction of the connection. The value obtained by dividing the measured voltage drop by the current applied represents the contact resistance.
NOTE: Add detail about connector types. Thermal considerations such as ambient temperature, heating. Number of mating cycles. Consider Hot Swap ie. max interrupt current vs. max current
The capability to detect that key parameters of the power system are within pre-determined limits, and provide an indication if one or more of the monitored parameters is outside the pre-determined limits. This capability may also provide an indication if a failure is detected in a sub-system or module within the power system even if the performance parameters remain within the predetermined limits. BIT
The capability to allow alteration of the power system state through local or remote control interface to meet overall performance objectives. Examples include remote resetting of protection circuits, remote on-off capability of system components, alteration of output voltage and/or current settings, etc.
Low voltage protection can be the function of a component or circuit in a power subsystem designed to sense and provide protection against either an input or output voltage that is below the level of normal or safe operation by reducing the subsystem operating stress or shutdown. This abnornal condition is usually reported by the subsystem as a failure to a monitoring system.
(Table items need to be defined.) Overcurrent characteristics are the features of multiple overload conditions in a power subsystem that can be caused or influenced by events such as worst case load changes, unstable output voltage regulation, or external/internal short circuits which force the subsystem to draw an excessive deviation of the defined operating current limits.
A function which causes the power system to automatically shut itself down if the temperature at a pre-determined monitoring point exceeds a pre-set threshold.
Note: May need to revisit for reorg. In doc. Conduction vs. Radiation Convection?
A thermal interface is normally a junction where there is a material type discontinuity in the heat flow path. This interface may have various physical spacing involving configurations ranging from the radiation into free space (or a vacuum) to a "hard" cemented or brazed junction.
Conduction cooling normally involves a hard physical junction, but also includes transfer between any physical materials as opposed to radiation being the heat transfer mechanism, in the heat flow path. Harry
Convective cooling normally involves a free gaseous or liquid junction between other heat carrying materials in the heat flow path. The cooling medium in most such power electronics heat exchange interfaces is atmospheric air. Convection cooling normally is by "free" or unforced cooling medium flow as a consequence of the heat exchange process. "Forced" cooling uses a mechanically imposed pressure difference to cause the cooling medium to travel across the heat flow interface.
Airflow normally refers to the flow of atmospheric air used as the cooling medium at a thermal interface. It may be referred to both as occurring in a supply duct or as the air passing over the actual heat exchange junction.
The increase in temperature at the point of interest when the power system is in operation as compared to the temperature at the same point when the power system is not operating (and has been shut down for a long enough time to fully cool down). Normally the temperature rise is measured after the power system has been in operation long enough to reach thermal equilibrium.
The maximum allowable temperature of the cooling medium, at the point where it enters the power system, required to maintain the power system elements within their safe operating temperature range.
Physical characteristics of the subsystem. ( NOTE: add to table if not already included: physical dimensions, materials, potting, sealing, etc described by dimensional drawings, identification of connectors, thermal performance data, and generic package identification.)
NOTE: The distinction between Component, Card/PWA, and BoxAssembly is made in this document to facilitate definitions of electrical and mechanical interface parameters for various levels of power electronic subsystems. Add graphic illustrating the following three levels:
A single low level replaceable circuit element. Card or Printed Wiring Assembly
A power electronic element consisting of a single card or printed wiring assembly (PWA) which may include "daughter" cards. Cards may consist of individual passive and active electronic components and / or power electronic subsystem components such as DC-DC converters.
A power electronic element consisting of multiple Cards or PWAs and/or other assemblies within an enclosed housing. Such elements may be a replaceable part of a larger assembly or a standalone unit.
The physical location within a component for which the remainder of the mass in all three planes(X,Y,Z) is centered.
Using a clamping device of suitable size for the unit being measured, and a mechanism for allowing the unit to rotate freely. Position the clamp near the apparent center of the unit and tighten. Rotate the unit about the clamping device and allow the unit to come to rest naturally. Once at rest, loosen the clamping device and reposition the clamp on the unit at a point lower than the initial position. Repeat this process until the unit is positioned in the clamp such that when rotated and allowed to come to rest naturally, the resulting at rest position is random.
Repeat the procedure for the remaining planes to be measured.
Note: consider adding hyperbaric, explosive decompression, etc.
The capacity of a given substance, usually a solid physical structure or surface, to maintain its physical and electrical properties in the presence of the given material. These materials include corrosive agents, solvents, jet fuel, hydraulic fluid, de-icer, and etc.
Sometimes airborne, generally solid particulate matter, both organic and non organic, usually smaller than 0.005 inch in its major dimension of any given constituency. Sand and dust impacts filters, bearing surfaces, etc.
The property of an ambient free space containing any combustible, normally "airborne" material along with air or other oxidizer, that is susceptible to being ignited with an explosive consequence. The combustible material may be particulate, aerosol, or gas; this material will normally be the "fuel" in an oxygen/air mix. Electronic power elements may be required to operate in an explosive atmosphere without acting as a source of ignition.
The tendency for an acoustic frequency to induce a physical, usually performance reducing, effect on a power electronic element due to exposure to a fluctuating gaseous pressure wave.
Note: May also be used for ultrasonic frequencies.
The generation and presence of fluctuating gas pressures in the audible frequency range due to a physical movement of one or more components of some equipment or apparatus. Turbulent gas movement may also generate audible noise.
Note: May also be used for ultrasonic frequencies.
Radiation is the transmission of electromagnetic energy in a wave motion mechanism by means of a dynamic electromagnetic field not requiring a transmission medium. Radiation may include thermal, subatomic, or RF whether radiated or irradiated,. or subatomic particulate matter.
The useful life of a subsystem statistically calculated for specified maintenance and operating conditions. Maintenance includes replacement of short life components as required.
List of agency accreditations including any limitations to the accreditation. For example, CE, FCC, UL and the section or paragraph for which accreditation was granted.
Level of conformance to requirements as indicated by defect rate, eg. defective parts per million (ppm).
Operating components below their rated operating limits to extend their useful life or reliability. Derating is usually stated as a percentage of rated operating limits.
A documented, systematic approach to ensure material, process, and test used in design and manufacture of a product so that performance is predictable and sufficient to meet requirements, eg ISO 9000.
A process of identification systems that tracks versions of subsystems. Subsystems may include software, firmware, and hardware assemblies. Configuration management may include record keeping by part, production run, or other relevant grouping.
A legal obligation that a product will perform within its specifications for a specified period of performance. Remedies for failure to perform as warranted are stated.
Procedures to ensure the accuracy of test equipment used to verify product compliance to design or performance specifications. Typically a calibration requirement includes a schedule for calibration, the standard to which the equipment is to be calibrated, instructions about handling product that was found to have been certified with out of calibration test equipment, and record keeping requirements such as calibration logs and equipment stickers. Bureau of standards link.
The condition that occurs at a point in time when a product is no longer readily available or supported.
TBD editorial note One must consider the effect on system availability if parts in the system are obsolete. Life time buy,
The method used to determine that a product meets its specification requirements. Qualification may be performed by any one or a combination of methods those being similarity, analysis, or test at various stages of product integration to verify that specified requirements are being met. NOTE: define similarity, analysis, test
save here
Functional testing of the product to requirements.
Test every item or a sample item.
The resistance found between two mating surfaces is generally determined by the surface contact area, pressure between the two mating surfaces, and the materials used for the contacts.
Apply a current equal to the mated rating of the connecting feature (pin, screw terminal, bus bar) and measure the voltage drop across the junction of the connection. The value obtained by dividing the measured voltage drop by the current applied represents the contact resistance.
NOTE: Add detail about connector types. Thermal considerations such as ambient temperature, heating. Number of mating cycles. Consider Hot Swap ie. max interrupt current vs. max current
Electrostatic Discharge is the sudden occurrence of current flow where a difference in dc voltage is equalized by a flow of charge between two electrically isolated bodies. This equalization is characterized by a rapid current flow that may also involve an arc discharge between what is primarily the capacitively stored charge on one or all involved bodies so that the voltage on the mutual bodies is essentially equal after the current flow.
ESD control is the process of minimizing possibility of the adverse occurrence of a rapid charge transfer. NOTE save for application guideline. Harry
Electrostatic Discharge. A phenomenon created in low humidity environments where an object collects an excess amount of charge. When this object comes within close proximity to an object of oppositely charged particles, the charge will transfer to the oppositely charged object, sometimes creating a spark. With or without a spark, this transfer of electrons has been shown to degrade, damage, or destroy electronic circuitry.
Varying voltage levels are general stored in a fixed capacitance and then applied through a fixed impedance. All externally accessible electrical interfaces to the unit should be tested IAW the intended environment. Look into definitions provided through MIL STD’s.
The physical location within a component for which the remainder of the mass in all three planes(X,Y,Z) is centered.
Using a clamping device of suitable size for the unit being measured, and a mechanism for allowing the unit to rotate freely. Position the clamp near the apparent center of the unit and tighten. Rotate the unit about the clamping device and allow the unit to come to rest naturally. Once at rest, loosen the clamping device and reposition the clamp on the unit at a point lower than the initial position. Repeat this process until the unit is positioned in the clamp such that when rotated and allowed to come to rest naturally, the resulting at rest position is random.
Repeat the procedure for the remaining planes to be measured.
The range of switching frequencies over which normal operation can occur.
NOTE: (discussion) Users must be aware that switching converter switching frequency must be understood. The system designer must address frequencies that are of concern to the application.
Measure the switching frequency by way of the input and output ripples’ fundamental (TBD switching frequency is referenced in P1515) frequency (see P1515 Ripple and Spikes Section 4.5).
Performance
Application GuideanceThis section intends to addresses some of the issues of power electronics systemssupply switching design or specification. It is intended to cover the major items of concern and provide guidance to the designer as to the applicability of CI elements. This guideline is intended to be one source of information. The designer is encouraged to consult all available information about this subject matter and choose an appropriate module(s) that will provide the best overall system performance, considering pertinent parameters and system requirements.
Identification of Power
loads, sources, converters, filters, cards,
Physical Elements are items such as cards, LRU/LRM/SRUs, and items used to construct an electronic subsystem
(TBD) Logical Elements such as loads, filters, sources, converters, and other functional entities, used in the design of power subsystem architecture
This document focuses on defining and quantifying the interfaces between power electronic subsystem elements(Move to abstract first sent.).
It is beyond the scope or the intent of this document to discuss or dictate the internal aspects of these elements or to specify the manner in which they are assembled to create a power electronics sub-system. There are, however, considerations in applying these elements that can facilitate the match of commercially available elements to application requirements and the successful implementation of a power electronic sub-system that consists of an interconnection of multiple elements. These considerations fall in the categories of requirement definition, architectural considerations, and system interaction.
Requirement definition, at each level in the power sub-system’s development, is perhaps the most crucial and potentially limiting task in the evolution toward development of the end product. This document is intended to reduce that limitation by providing common terminology and definitions for sub-system parameters and by quantifying typically required, and more importantly, typically available values for these parameters. Caution, however, is urged in the use of these quantified parameters. At their extremes they represent current state-of-the-art product on the commercial market at a particular element level. Sub-system products defined by combinations of these values may neither be available with current element products or economically achievable. Values such as power density or reliability available with low level building block elements will generally have to be relaxed for sub-systems built with combinations of these and other elements. Guidelines for successful requirement definition include leaving interface parameter definitions as loosely defined as practical and involving manufacturers of building block elements under consideration in trade-off decisions during the requirement definition process.
Architectural considerations are also key to successful electronic power sub-system definition. The primary sub-system and building block element interfaces, as defined in this document, are electrical, mechanical, environmental, and system effectiveness. One or more of these interfaces may not ideally map from an application’s required interface to the element’s available interface. Mapping between these interface requirements may be possible with specific architectural arrangements of available elements and or by providing additional circuitry or buffering between system and element interfaces. Figure 1 depicts these architectural considerations. Examples of methods for mapping required interfaces to available elements are depicted for each of the defined interfaces.
Architectures that facilitate the use of available products – insert architecture diagram, target high volume industry to map to a general architecture (automotive, telecom)
System Interaction More needed TBD
– Specify only to the actual requirements, the limits of the requirements may not be available in combination. System developer should consider alternatives to accommodate available products. Work with manufacturer to achieve accommodation. Select the minimum parameter set that satisfies the requirements. For the selected parameter set, specify only to the actual requirements. If the limits of the requirements are not available in combination, the system developer should consider alternatives to accommodate available products. Work with manufacturer to achieve accommodation.
System interaction considerations are also key to successful sub-system implementation. Power electronic sub-systems are often as a distributed power architecture with one or more stages of series power conversion with the potential of parallel elements at each stage. Thermal, structural, and reliability interactions must also be considered which are discussed in section 7.4.
When constructing power electronic subsystems from available subsystem elements it is often desirable to parallel multiple elements for increased current / power rating. The potential for using such solutions is partially determined by the degree and method by which the elements will share supplying the system load. This guideline is intended to highlight items to bear in mind when considering use of paralleled elements, not to provide detail design implementation guidance. Some of the more common schemes are discussed:
Elements connected in parallel without specific current share provisions will typically operate as follows. One element will typically have a regulation set point slightly higher than the remaining elements. This unit will take current until its output sags to below the no load regulation point of another element. With good load regulation this may not occur until the first element reaches current limit. Therefore this scheme will not work with shutdown or cyclic current limit schemes. Even with elements employing linear (square or foldback) current limit there may be performance problems since one or more elements operate in current limit as the system load is increased. As a minimum the elements must be safe for continuous operation with overload.
Typical schemes, at least with current mode control, are that one module will set the current share bus set point, others will follow. Considerations include protection against open / short circuit on the bus as a single point subsystem failure mode, low pass filtering of the current share signal to prevent transient instabilities, and turn-on/off initialization.
(Consider using as intro to 6.0)
This application guideline intends to address the issues of power supply switching frequency stability as it relates to system level performance. It is intended to cover the major items of concern and provide guidance to the designer as to the applicability of CI elements. It is hoped that the designer consulting this guideline will avail himself/herself of all available knowledge about this subject matter and choose an appropriate module(s) that will provide the best overall system performance, considering all parameters (move to section 7.0). There are two basic types of switching converters, fixed and variable. Each one has its own merits and pitfalls. The consequences of the different schemes are far reaching, subsequently the designer must be aware of the methods and their effects at the system level. It should be noted that one method should not be favored over the other until all information is gathered, and examined with regard to the system level requirements. Additionally, the designer is urged to purchase and test several different types of modules, under realistic conditions that simulate the system installation, in order to verify actual performance.
Generally, there are two basic methods of frequency control, fixed and variable. When considering a "stability" measurement, it is implied that there is a fixed parameter with some variance associated with it. Therefore, a "stability" cannot be associated with a variable frequency system, and one must use some other measurement, i.e. frequency range, deviation, etc.
In this mode of operation, the switching frequency is designed to remain fixed, with some tolerance allowed for initial set-point accuracy and deviations from that set-point due to other effects. Typical items that will effect a change of frequency include temperature, humidity, aging, variable resistor drift, PWM IC discharge current, etc. Typically, switching power supplies operate at a fixed frequency between a few kHz and a few MHz. A typical tolerance of a commercially available module is +/- 10%, as published. However, under extreme operating conditions, worst case circuit analyses predict that deviations over life can approach +/- 50%. The designer is encouraged to inquire about any analyses that the vendor can supply in regard to the "stability" of the switching frequency since the data sheet may contain "typical" data, and not the worst case scenario.
Variable frequency operation is just that, variable. The switching frequency is changed dynamically during line and load changes such that a particular mode of operation is maintained. There are many topologies that utilize variable frequency to insure that switching action occurs at a precise time. For example, ZCS (zero current switching), and ZVS (zero voltage switching) may require that the frequency be altered such that the internal switches will only switch under the appropriate conditions. Therefore, you can expect the frequency to vary during operation when either a line change occurs, or a load change occurs. Under static operating conditions the frequency should remain relatively constant.
TBD move strikeout to EMI section
All switching converters generate some form of EMI (Electro Magnetic Interference). Typically, the user will be concerned with conducted emissions on the input lines, noise on the output lines, and possibly radiated emissions from the module itself. Conducted emissions on the input (and output) lines are classified into common mode (CM), and differential mode (DM) noise. Common mode noise is typically generated by two methods, switching currents induced into the chassis, and radiation. Differential noise is generated by the conversion process, primarily caused by discontinuities of the input current waveforms to the main converter transformer. There can be large differences in EMI due to the switching topology chosen, and the method of frequency control. The designer is encouraged once again to solicit information from the vendor and obtain accurate plots of DM and CM noise on both the input and output terminals. The impact of frequency stability over line, load, temperature, and life should be considered.
The fixed frequency converters tend to have higher CM and DM noise due to the relatively high dV/dT of the switching devices. However, this is not always the case since there are many variants of fixed frequency operation, including RTS (resonant transition switching, or "soft switching"), that may reduce the dV/dT considerably.
Common mode noise is not well specified. See your EMI guy.
Electrical Terminations (for components/PWAs/ Boxes)
For component level elements these are typically either pins suitable for directly soldering in PWAs or insertion in connector sockets or terminals suitable for soldering wires to.
For card / PWA level elements there is a wider variety of possible terminations, most common being some type of board mounted connector, usually for mating to a motherboard connector in a next higher assembly.
For Box / LRU level assemblies these are usually some type of pins, lugs, bus bars, or enclosure mounted connector for mating to a cable assembly in the using system.
Ability of a Power Electronic Subsystem to withstand without damage the application of input and/or output power connections in reverse order. Usually implemented via either shunt or series protection devices. Shunt protection will typically present low impedance to the source, which may draw current sufficient to trip external protection devices, and series protection will typically present high impedance to the source approximating an open circuit.
In general, any power subsystem requires some form of control and monitoring. For a simple power subsystem, the monitoring may be integrated into the power conversion module itself, and no separate controller may be required. However in larger or more complex power subsystems the controller is usually implemented as a separate module within the subsystem.
Normally a hierarchical arrangement is used for control and monitoring:
The functions provided by the system controller will depend on the power subsystem specification and requirements, and may include some or all of the following:
Monitoring
-system output voltage(s)
-total system output current(s)
-battery status (if applicable)
-battery charge or discharge current
-temperature at one or more points in the system
-status/failure of modules
-status/failure of standby elements in redundant system
-environmental monitoring
-input voltage
-input current
Control
-adjust output voltage
-load current sharing between elements
-set protection levels for overcurrent
-set protection levels for over/under-voltage
-configure the power system by enabling/disabling elements
-remote reset of circuit breakers
-output power sequencing
-periodic testing of elements
-set protection level for over temperature
-remote on/off
User interface capabilities
-status of monitored data
-input parameters for control actions
-alarm signal to "outside world" (may be local or remote)
-remote user interface (RS232, modem, web access, etc)
-display information in a convenient and user-friendly manner
In power systems where a monitoring and/or control interface between elements is implemented using a datalink (such as RS232, CAN, …), then the software used must be fully taken into account during the system design and integration. This applies at all layers of the software, and if they are not fully compatible then one of two actions must be taken:
Because of the large number of possible datalink software implementations, no attempt is made in this document to recommend a single solution.Software Implementation – David Cooper
The project determines responsibility for accommodation, either the system designer or the power subsystem developer.
Accommodation can include:
Physical Environment (Mechanicals) – shock, vibration, structural
When a selected module’s input voltage range is insufficient to tolerate transients on the voltage source can be adapted by:
MOV
For component level elements these are typically either pins suitable for directly soldering in PWAs or insertion in connector sockets or terminals suitable for soldering wires to.
For card / PWA level elements there is a wider variety of possible terminations, most common being some type of board mounted connector, usually for mating to a motherboard connector in a next higher assembly.
For higher level assemblies such as LRUs these are usually some type of pins, lugs, bus bars, or enclosure mounted connector for mating to a cable assembly in the using system.
Ability of a Power Electronic Subsystem to withstand without damage the application of input and/or output power connections in reverse order. Usually implemented via either shunt or series protection devices. Shunt protection will typically present low impedance to the source, which may draw current sufficient to trip external protection devices, and series protection will typically present high impedance to the source approximating an open circuit.
Typically, the user will be concerned with conducted emissions on the input lines, noise on the output lines, and possibly radiated emissions from the module itself. Conducted emissions on the input (and output) lines are classified into common mode (CM), and differential mode (DM) noise. Common mode noise is typically generated by two methods, switching currents induced into the chassis, and radiation. Differential noise is generated by the conversion process, primarily caused by discontinuities of the input current waveforms to the main converter transformer.
The fixed frequency converters tend to have higher CM and DM noise due to the relatively high dV/dT of the switching devices. However, this is not always the case since there are many variants of fixed frequency operation, including RTS (resonant transition switching, or "soft switching"), that may reduce the dV/dT considerably.
If a variable frequency scheme is used, the output spikes will vary according to the frequency, and the designer should be aware of this. In certain platforms, particularily sensitive RF equipment, specific frequency bands must remain relatively quiet, in order to obtain maximum performance from the equipment. Therefore, the designer must balance the noise output versus the change in frequency expected in determining the applicability or suitability of specific modules.
,
Thermal issues are in mechanical section
Specify only to the actual requirements, the limits of the requirements may not be available in combination. System developer should consider alternatives to accommodate available products. Work with manufacturer to achieve accommodation. Select the minimum parameter set that satisfies the requirements. For the selected parameter set, specify only to the actual requirements. If the limits of the requirements are not available in combination, the system developer should consider alternatives to accommodate available products. Work with manufacturer to achieve accommodation.
Verify that these are covered elsewhere
For component level elements these are typically either pins suitable for directly soldering in PWAs or insertion in connector sockets or terminals suitable for soldering wires to.
For card / PWA level elements there is a wider variety of possible terminations, most common being some type of board mounted connector, usually for mating to a motherboard connector in a next higher assembly.
For Box / LRU level assemblies these are usually some type of pins, lugs, bus bars, or enclosure mounted connector for mating to a cable assembly in the using system.
Ability of a Power Electronic Subsystem to withstand without damage the application of input and/or output power connections in reverse order. Usually implemented via either shunt or series protection devices. Shunt protection will typically present low impedance to the source, which may draw current sufficient to trip external protection devices, and series protection will typically present high impedance to the source approximating an open circuit.
verify that this is covered 8.x Synchronization
EMI
Output noise is mainly classified into two categories, ripple and spikes. Output ripple is a function of many variables, but is primarily effected by output capacitance, output load and input voltage. It occurs at the fundamental or harmonic of the switching frequency, depending on the topology of the module. Spikes are actually switching transients, and occur when a switching element within the module changes states. Spikes are always at a higher frequency than the switching frequency, and are usually rich in harmonic content. Due to physical constraints, spikes are usually limited to 50 MHz, and contain little energy. However, they are relatively difficult to contain, since they radiate quite well and are of higher frequency than most devices used to reduce them. For example, the resonant frequency of a 1 uF ceramic capacitor, with ¼" leads, is less than 10 MHz, making it quite ineffective. Additionally, it is quite difficult to predict what the spike levels will be in the system until it is actually tested. Again, consideration should be given to the method of frequency control, since this will have an effect on the output noise. For example, If a variable frequency scheme is used, the output spikes will vary according to the frequency, and the designer should be aware of this. In certain platforms, particularily sensitive RF equipment, specific frequency bands must remain relatively quiet, in order to obtain maximum performance from the equipment. Therefore, the designer must balance the noise output versus the change in frequency expected in determining the applicability or suitability of specific modules.
TBD consider moving to intro of this section
There are two basic types of switching converters, fixed and variable. Each one has its own merits and pitfalls. The consequences of the different schemes are far reaching, subsequently the designer must be aware of the methods and their effects at the system level. It should be noted that one method should not be favored over the other until all information is gathered, and examined with regard to the system level requirements. Additionally, the designer is urged to purchase and test several different types of modules, under realistic conditions that simulate the system installation, in order to verify actual performance.
ANNEX
PerformanceAnnex A1: Performance
(informative)
Parameters have been identified for each of the interfaces described in 3.1.4. For each parameter, performance ranges that are commercially available are indicated. Extraordinary requirements have been defined for many parameters. These are usually requirments for high reliability or harsh environment applications. This data has been compiled into tables TBD in Annex 7.1
TBD add paragraph to reference tables
The electrical interface is bounded by the input voltage and the output voltage. There may be control signals or test points which need to be addressed. There can be various configurations within this boundary whose internal interfaces are unknown. Several "building blocks" can be connected together with one blocks’ output connected to the next blocks’ input. Blocks may be components or cards. Table 1, Table 2 and Table 3 describe electrical performance.
NOTE: Commonly Available = Capability: Extraordinary Requirements = Requirements discussion about changing headers
Table 1 General Interface GeneralENERAL ElectricalLECTRICAL InterfaceNTERFACE Performance
|
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
|
Safety Agency Approvals EMI, Electrical performance Reference MIL-STD B5087 5400 1399 Manufacturer’s specifications |
|
|
|
Vibration, dissimilar metals, current rating, specify |
|
|
|
Process controls and packaging (ref ANSI625) |
|
|
|
Characterization data needed – define what’s isolated and the dc isolation voltage. |
Input to chassis, output to chassis, input to output. Voltage/resistance as required |
|
|
Power supply status signals Vendor to characterize: Overload, overvoltage, over-temperature, and, input undervoltage failures. Power on Reset "power good signal" Fan failure, breaker tripped |
All usually required plus Input Power good indicator, Elapsed Time sufficient IEEE 1149.1, 1553, RS232 |
Table 2 Electrical Interface: Output/Load Performance
|
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
|
1.5, 2.1, 2.5, 2.8, 3.3, 5, +/-5, 8, +/-12, +/-15, 24, 28, 36, 48, 54 |
Nominal Range 0.8 – 50Vdc (digital & low level analog) |
|
|
Single or Main output: 0.02% to 1% Static variation about the set point Secondary output: 5% – 10% |
TBD |
|
|
Single or Main output: 0.02% - 0.5% Secondary output: 1% –5% |
TBD |
|
|
0.005 – 0.02% / ° C |
TBD |
|
|
3% |
1% for < 5V 1% - 10% for > 5V which method RSS or extreme value |
|
|
0.02% / 1000hrs |
TBD |
|
|
0.5% to 1% |
TBD |
|
|
-50% to +10% when available (usually single output only) |
TBD |
|
|
Varies widely based on system architecture |
TBD |
|
|
1% p-p Vout 5V to 50V @ switching frequency 2% p-p Vout <5V @ switching frequency BW<20 MHz, at specified conditions |
BW<100 MHz |
|
|
1% p-p Vout 5V to 50V 2% p-p Vout <5V BW<20 MHz, at specified conditions |
TBD |
|
|
For fixed frequency switching topologies, the operating frequency is typically +/-10% of the initial set point. For variable frequency switching converters, the operating frequency can vary depending on line and load conditions. |
TBD |
|
|
Vendor specifies availability and interface |
TBD |
|
|
TBD |
As required (ref MIL-STD 461) |
|
|
Vendor specifies availability and interface Analog trim pin On/Off control Serial interface |
TBD |
|
|
Vendor specifies availability, trip point, and characteristics |
Should be sufficient to protect power supply and provide access for shutdown. [Need shutdown access because BIT circuitry needed anyway ® many times external circuitry used to perform this function] |
|
|
TBD |
Indication sometimes required |
|
Short circuit response |
Straight line Foldback Cyclic Trip point and tolerance – 104% (defines max operating current) to 125% Characterize voltage recovery characteristics |
Withstand indefinite overload or short circuit Indication may be required. |
|
|
Vendor needs to specify availability and time |
Up to several seconds may be required Up to 200ms is common |
|
|
Vendor needs to provide response characteristic. TBD |
Turn on time (20 – 100ms), overshoot |
|
|
Often required for multiple outputs |
|
|
|
Often required for multiple outputs |
|
|
|
Max di/dt - 0.5A/usec to 30 A/usec Steploads - TBD |
Steploads - Vendor to specify voltage deviation and settling time. Per IEEE P1515 |
|
Over-temp due to short circuit |
Available – characterize when available Characterize voltage recovery characteristics |
Sometimes required |
|
|
|
TBD Building Code – Different for each P.S. Design – best approach might be to define a criteria Reactance, max capacitance, |
|
|
If a (-)R is present, output impedance needs to be characterized. |
|
|
|
Sometimes available TBD
|
need to know the following: current sharing tolerance: 2 – 10% current sharing stability characterization response to output short characterization response to control bus failure characterization capacity vs. redundancy |
|
|
TBD |
Zout, Zload, Zin Gain and phase margin |
Table 3 Electrical Interface Source Performance
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
|
48Vdc nom (36 – 75Vdc) 24Vdc nom (18 – 36Vdc) 300Vdc nom (180 - 375 V dc)
85V - 264V ac or dc, Universal Input, single phase 120/240Vac nom (90 – 132 / 180 – 264 V ac, (50 Hz, 60 Hz,)) |
28Vdc, 270Vdc, 115/200 Vac (400 Hz) per (MIL-STD 704, RTCA DO 160C,)
Backplane voltages 10Vdc, 48Vdc
|
|
|
VDE, UL, CSA, TUV, CE, BABT, FCC |
MIL-STDs 461, 462, RTCA-DO160C, VDE, FCC NOTE: HIRF (Highly Intensified RF) – No building code is needed…. Module testing does not provide good insight into system performance. Following characterization data is needed: EMI: Conducted Emissions – 50 kHz to 50 Mhz Conducted Susceptibility – 30 Hz to 50 kHz Radiated Emissions – TBD Radiated Susceptibility – TBD {Issue with "radiated parameters" is… will the cost of this test provide value? – can bench test provide data to enable integration success} Magnetic fields – No building code needed…too specialized |
|
|
VDE, IEC61000, Power Factor correction is not commonly available for 3 phase systems |
Boeing requirement, MIL-STD 704, 461 |
|
|
Vendor Characterization |
X times max steady state i2t limit for < 1ms |
|
|
VDE, UL, CSA, TUV, CE, |
MIL-STD 461 |
|
|
<10% of Iin @ switching frequency |
MIL-STD 461 |
|
|
ac – ac fail alarm then shutdown dc – Some have undervoltage lockout |
Needs to operate 0 to max Vin with no damage Characteristics must define – Vout response from 0 to Vin, max. |
|
|
May be required |
|
|
|
Characterize if Available |
Sometimes required |
|
|
TBD Building Code – Different for each Power Supply Design – best approach might be to define a criteria |
|
|
|
Vendor characterize if issue |
The mechanical interface includes size, mounting methods, thermal requirements, external connections, etc. Mechanical Performance is shown in Table 4.
Table 4 Mechanical Interface Performance
|
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
|
The following applicable parameters shall be supplied at no load, half load, and full load |
|
|
NA |
NA |
|
Thermal I/F flatness – characterization 0.01in/in typical Characterize maximum operating baseplate temperature ( 100 ° C ) at full power
Characterize in in2 or cm2 |
Power dissipation at max temp and full load Baseplate temp vs. power curve Characterize max operating baseplate temperature at full given power and given environment
Total Indicator Runout as required Characterize in cmin2 |
back pressure
|
Airflow – characterization Linear Feet / Min. at STP
Pressure drop – characterize in. of H2O difference between inlet and outlet function of flow rate Back press. – characterize source pressure = outlet pressure + pressure loss function of flow rate
Characterize in ° C Characterize in ° C |
Airflow – mass flow rate (at altitude) Specify inlet and outlet temperature and flow rate or pressure drop |
|
|
Characterize in liters/hr Characterize inches of H2O difference between inlet and outlet Characterize in ° C Characterize in ° C Liquid requirement – characterization of: flow rate (liters/hr), type, MSDS, fitting interface, max inlet temperature |
|
|
Vendor to provide efficiency so that Maximum power dissipation can be calculated for module (refer to efficiency in electrical table) |
Maximum expected dissipation for system |
|
|
NA |
NA |
|
||
|
0.375" to 0.5" height is near minimum Typical brick ( 4.6"x2.3"x0.5"), half brick (2.3"x2.3"x0.5"), quarter brick: (2.28"x1.45"x0.5"); other sizes are available JEDEC power supply components |
Provide environment compatible with component requirements such as: cooling, EMI, vibration, and other considerations herein defined. |
|
|
Follow manufacturers recommendations such as torque requirements, adhesives, soldering etc |
Follow recommendations |
|
|
VME-6U, 3U, SEM(Standard Electronic Mod), Standard Aerospace Module(SAM), PCMCIA, ISA, and others |
Define a compatible PWA |
|
|
NA |
NA |
|
Specify location and function |
User must define a compatible interface |
|
|
Specify location and function Pin/lugs/terminal block, flying leads, connectors Connector keying |
User must define a compatible interface Testability access Connector keying |
|
|
NA environmental, sockets not used Specify plating |
Solderability, corrosion Number of Insertions, Insertion/extraction force |
|
|
Solder temperature and time. |
Must comply |
|
|
Characterize weight (lbs., kg,), overall dimensions |
Minimize weight for aircraft, volume (in3, cc) |
|
|
Safety certifications such as CE |
Flammability UL V94-0 Characterize case material/packaging material- ex. Out-gassing Characterize Product Marking – durability Characterize Case emissivity Hazardous materials statement |
|
|
Not Normally Available |
May be required |
Environmental Interface Performance
There are several conditions to consider for environmental Performance. The operating and non-operating environments have to be defined. There may be several different environments within one platform such as wing pylons vs. cockpits of fighter aircraft. Performance may also be life expectancy oriented or simply robustness indicators. Table 5 contains environmental Performance.
Table 5 Environmental Interface Performance
|
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
General Note. Make distinction between – non-operating and operating |
||
|
TBD |
TBD |
|
0 to 70 ° C – Commercial, -40 to 85 ° C - Industrial (component level) -40 to 100 ° C (module level) -20 to 85 ° C (assembly level) Specify thermal interface Baseplate or ambient temp |
-XX (55) to +XXX (125) ° C known aircraft apps, free airflow, worst case environment- pylon, wing, operational/standby, storage higher. (Consider alternatives or relaxation of specification for CI applications) RTCA DO-160C, D Basis for operating temperature range defined (qualification test, ATP, etc.) |
|
|
Usually not stated
|
Dictated by system design requirements or tailored MIL STDs. Designer to characterize or specify level and method. Define ATP (Acceptance Test Plan) to include ESS (Environmental Stress Screening) and other test procedures as required. Test, analyze, and fix in development and qualification phases. Acceptance test procedures for production. |
|
|
0 to 95%, non-condensing |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
As required by safety agencies, CE, UL, TUV, VDE, etc. |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
Up to and including 10,000 feet. |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
As required by safety agencies, CE, UL, TUV, VDE, etc. |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
May be available in different product grades. |
Dictated by system design requirements or tailored MIL STDs. Designer to characterize or specify level and method. Define ATP (Acceptance Test Plan) to include ESS (Environmental Stress Screening) and other test procedures as required. Test, analyze, and fix in development and qualification phases. Acceptance test procedures for production. |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Designer to characterize or specify level and method. Define ATP (Acceptance Test Plan) to include ESS (Environmental Stress Screening) and other test procedures as required. Test, analyze, and fix in development and qualification phases. Acceptance test procedures for production |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Designer to characterize or specify level and method. Define ATP (Acceptance Test Plan) to include ESS (Environmental Stress Screening) and other test procedures as required. Test, analyze, and fix in development and qualification phases. Acceptance test procedures for production *May be required for each production unit |
|
|
Usually not stated |
Dictated by system design requirements or tailored MIL STDs. Test, analyze, and fix in development and qualification phases. |
System Effectiveness Performance
System Effectiveness Performance is concerned with reliability and maintainability. Table 6 contains System Effectiveness Performance.
Table 6 System Effectiveness Interface Performance
|
Interface Parameter |
Commonly Available |
Extraordinary Requirements |
|
When available, calculated or demonstrated per Mil-Std 217 as requested. |
Dictated by system requirements or Mil-Std 217. Physics of failure models. |
|
|
Repair or replace |
Characterize throw away vs. repair method and repair cost. |
|
|
Identify compliance and agency approvals ex FCC Part 15, BABT, UL, CSA, VDE |
|
|
|
Not Available |
Awareness of limited life components |
|
|
Delete |
|
|
|
Vendor recommendation available |
Negotiated |
|
|
Process control methods and certifications disclosed (ISO Registration, SPC, screening, ATP) |
Process control methods, results, and certifications disclosed |
|
|
‘Specifications are subject to change without notice" is typical |
Change notification Latent defect notification |
|
|
As stated |
As specified per contract requirements |
|
|
Per process control |
Required |
|
|
Disclosure when no longer available |
Obsolescence mitigation plan |
|
|
Per process control |
Qualification test report Test to standard (P1515) |
|
|
Testing Process details and data. As specified. |
Required |
|
|
Not Expected NOTE: Under discussion |
Required |
Annex 2Annex B: Parameter Index
(informative)
Table 7 General System Electrical Interface Parameters
|
Parameters |
Where Defined |
|
Bonding resistance to chassis |
Per P1515, 4.9.3 (UUT Grounding) |
|
Contact Resistance |
|
|
ESD |
|
|
Isolation |
Per P1515, 4.9.2 (Input- Output Isolation Resistance) |
|
Status Monitoring vs. BIT |
TBD BIT per P1515 |
Table 8 Electrical Output/Load System Interface
|
Nominal dc output voltage (Vdc) |
Per P1515, 3.8 (DC Signal). Measurement similar to P1515, 4.1.1 (DC Input Voltage) except taken at UUT output. |
|
Regulation, Load (min to full load) |
Per P1515, 4.4.2 (Load Regulation). |
|
Regulation, Line |
Per P1515, 4.4.1 (Line Regulation). |
|
Regulation, Temperature (drift over rated temperature range) |
Per P1515, 4.4.3 (Temperature Regulation). |
|
Regulation, Combined |
|
|
Regulation effects due to aging |
|
|
Set point voltage accuracy |
|
|
Output Voltage Trim Range |
Per P1515, 4.14.2 (Voltage Trim). |
|
Power Density |
|
|
Voltage Ripple |
Per P1515, 4.5.1 (Output Voltage Ripple). |
|
Voltage Spikes |
Per P1515, 4.5.3 (Switching Spikes) and 3.43 (Transient). |
|
Switching frequency Stability |
|
|
Synchronization |
|
|
Noise spectrum – EMI |
|
|
Voltage Programming |
Per P1515, 4.14.3 (Remote Programming). |
|
Overvoltage Protection |
Per P1515, 4.15.2 (Overvoltage Response). |
|
Low Voltage Protection |
|
|
Overcurrent characteristics |
|
|
Short circuit response |
Per P1515, 3.38 (Short Circuit) and 4.15.4 (Overcurrent and Short-Circuit Current Protection). |
|
Hold up time |
Per P1515, 4.6.1 (Hold up Time). |
|
Start up Trajectory |
Per P1515, 4.6.2 (DC Source Inrush Current). |
|
Power up voltage sequence |
Per P1515, 4.8.1 (Start-up Sequencing/Remote On/Off Control). |
|
Shutdown sequence |
Per P1515, 4.8.2 (Turn-Off Sequencing/Remote On/Off Control). |
|
Load dynamics |
Per P1515, 4.4.7 (Dynamic Load Regulation). |
|
Overtemperature Shutdown |
|
|
Overtemperature due to short circuit |
Per P1515, 3.27 (Overtemperature Protection) and 4.15.4 (Overcurrent and Short-Circuit Current Protection). |
|
Load Impedance Safe Operating Area |
Per P1515, 3.22 (Load Impedance) and 4.4.2 (Load Voltage Regulation). |
|
Output impedance |
Per P1515, 4.7.2 (Output Impedance). |
|
Current sharing: Multiple Modules Capacity vs Redundancy |
Per P1515, 4.13 (Use of Multiple Power Supplies in a System). |
|
Loop stability |
Per P1515 3.23 (Loop Stability). |
Table 9 Electrical Source System Interface Parameters
|
Source Power |
Per P1515, 3.48 (Vnom Input) plus a number of input parameters describing AC and DC source power. |
|
EMC (Electro-Magnetic Compatibility) |
Per P1515, 3.13 (EMC) |
|
Power Factor (Harmonic content, loss of 1 phase, 3rd harmonic distortion, 3 phase – I/V balance, frequency) |
Per P1515, 3.34 (Power Factor (Displacement)), 3.35 (Power Factor (Distortion)), 3.36 (Power Factor (True)) |
|
Inrush Current Profile |
Per P1515, 4.6.2 (DC Source Inrush Current). |
|
Leakage current to chassis |
Per P1515, 4.9.1 (AC Leakage Current), 4.9.2 (Input-Output Isolation Resistance). |
|
Reflected Ripple Current p-p |
Per P1515, 4.5.4 (Input Induced Ripple Current). |
|
Undervoltage protection (shutdown & recovery characteristics) |
Per P1515, 4.15.3 (Output Undervoltage/Overvoltage Indication). |
|
Source Impedance as a function of frequency |
Per P1515, 4.7.3 (Input Impedance). |
|
Reverse Polarity Protection |
|
|
Input Impedance as a function of frequency |
Per P1515, 4.7.3 (Input Impedance). |
|
Three phase – phase rotation insensitivity |
Per P1515, 4.2.6 (Phase Sequence). |
|
Mechanical System Interface Parameters |
|
|
Thermal Management |
|
|
Thermal Interface Type – simple definition of type |
|
|
Cooling Provision |
Per P1515, 5.4.7 (Cooling Requirements). |
|
Conduction Cooling |
|
|
Flatness |
Per P1515, 5.4.8 (Baseplate Flatness). |
|
Maximum baseplate temperature |
Similar to P1515, 3.24 (Operating Temperature) |
|
Thermal Dissipation Area |
May be similar to P1515, 5.4.2 (Footprint) if thermal dissipation area is same as footprint for a part. |
|
Convection Cooling |
|
|
Airflow |
|
|
Pressure drop/back pressure |
|
|
Temp rise |
|
|
Max Inlet temp |
|
|
Liquid Cooling (Pipe) |
|
|
Flow rate |
|
|
Pressure drop |
|
|
Temp rise |
|
|
Max inlet temp |
|
|
Cooling medium |
|
|
Maximum Power Dissipation |
|
|
Packaging |
|
|
Component (may be on a "PC board") |
|
|
Configuration |
Per P1515, 5.4.3 (Envelope Dimension) and 5.4.2 (Footprint). |
|
Mounting |
Per P1515 5.4.4 (Mounting Orientation) and 5.4.10 (Layout) and 5.4.11 (Installation Methods). |
|
Card/PWA Level |
|
|
Electrical Connection |
Per P1515, 5.4.5 (Connection Types) and 5.4.6 (Connection Locations). |
|
Component pin outs. |
Per P1515, 5.4.1 (Pin-out). |
|
Electrical Terminations (for components/PWAs/ assemblies) |
|
|
Durability |
Per P1515, 5.3.5 (Mechanical Shock and 5.3.6 (Vibration). |
|
Solderability |
Per P1515, 5.4.11 (Installation Methods). |
|
Weight/Dimensions |
Per P1515, 5.4.3 (Envelope Dimension) and 5.4.2 (Footprint). |
|
Package Characteristics |
|
|
Center of gravity |
Table 10 Environment System Interface Parameters
|
Storage Temperature Range |
Per P1515, 5.3.12 (Storage Temperature). |
|
Operating Temperature Range |
Per P1515, 5.3.9 (Operating Temperature). |
|
Shock and Vibration (could have more impact on power supply systems) |
Per P1515, 5.3.5 (Mechanical Shock) and 5.3.6 (Vibration). |
|
Humidity (combined environments.) |
Per P1515, 5.3.1 (Humidity). |
|
Resistance to materials (jet fuel, hydraulic fluid, de-icer, gases, corrosive agents) |
|
|
Salt-spray |
Per P1515, 5.3.3 (Salt Fog). |
|
Altitude – out-gassing/decompression/ corona |
Per P1515, 5.3.4 (Storage Altitude) and 5.3.7 (Outgassing). |
|
Fungus |
Per P1515, 5.3.14 (Fungus). |
|
Sand and dust |
|
|
Explosive atmosphere |
|
|
Thermal shock/Thermal cycling |
Per P1515, 5.3.8 (Thermal Shock) and 5.3.10 (Temperature (Thermal) Cycling). |
|
Combined effects (Many Environments @ once) |
|
|
Acoustic Susceptibility |
|
|
Acoustic Emissions/ audible noise. |
|
|
Radiation |
Table 11 System Effectiveness Interface Parameters
|
Compliance Information, e.g., Agency Approvals |
|
|
Product Life |
|
|
Component Quality |
|
|
Derating |
|
|
Quality Control |
|
|
Configuration Management |
|
|
Warranties |
|
|
Test Equipment Calibration and Standards |
|
|
Product Obsolescence |
|
|
Qualification Process |
|
|
Production line final test – testing the production line. |
|
|
First Article Test - |
|
|
Acceptance Testing(each unit |
|
|
Reliability – MTBF |
Per P1515, 5.1.3 (MTBF). |
|
Maintainability |
Per P1515, 5.2.1 (Maintainability). |
Table 12 Mechanical Interface Performance
|
Thermal Management |
|
|
Thermal Interface |
|
|
Conduction Cooling Flatness Maximum baseplate temperature Thermal Dissipation Area |
|
|
Convection Cooling Airflow
Pressure drop/ back pressure
Temp rise Max Inlet temp |
|
|
Liquid Cooling (Pipe) Flow rate Pressure drop
Temp rise Max inlet tem Cooling medium |
|
|
Maximum Power dissipation |
|
|
Physical characteristics of a system |
|
|
Component (may be on a "PC board") |
|
|
Configuration |
|
|
Mounting |
per 1515 5.4.4 (Mounting Orientation), 5.4.10 (Layout), 5.4.11 (Installation Methods) |
|
Card/PWA Level |
|
|
Electrical Connection |
Per 1515 5.4.5 (Connection Types), 5.4.6 (Connection Location) |
|
Component pin outs. Note move to electrical connection |
Per 1515 5.4.1 (Pin-out) |
|
Electrical Terminations (for components/PWAs/ assemblies) |
|
|
Durability |
Per 1515 5.3.5 (Mechanical Shock), 5.3.6 Vibration) |
|
Solderability |
Per 1515 5.4.11 (Installation Methods) |
|
Weight/Dimensions |
Per 1515 5.4.3 (Envelope Dimension), 5.4.2 Footprint |
|
Package Characteristics |
|
|
Center of gravity |
New Parameters
System Effectiveness
Electrical
Mechanical
-
Environmental
-
Scrap; Notes:
Is all this covered?
The Recommended Practice provides guidance in performance of the following functions:
(Save for presentation materials
Providers of power electronics can reference this document to publish expanded standardized data. Integrators of special applications can use this data to select CIPE products, thus promoting use of CIPE. )
System Element and Architecture Definition
Identification of Power
loads, sources, converters, filters, cards,
Physical Elements are items such as cards, LRU/LRM/SRUs, and items used to construct an electronic subsystem
(TBD) Logical Elements such as loads, filters, sources, converters, and other functional entities, used in the design of power subsystem architecture
From Output Noise
Output noise is mainly classified into two categories, ripple and spikes. Output ripple is a function of many variables, but is primarily effected by output capacitance, output load and input voltage. It occurs at the fundamental or harmonic of the switching frequency, depending on the topology of the module. Spikes are actually switching transients, and occur when a switching element within the module changes states. Spikes are always at a higher frequency than the switching frequency, and are usually rich in harmonic content. Due to physical constraints, spikes are usually limited to 50 MHz, and contain little energy. However, they are relatively difficult to contain, since they radiate quite well and are of higher frequency than most devices used to reduce them. For example, the resonant frequency of a 1 uF ceramic capacitor, with ¼" leads, is less than 10 MHz, making it quite ineffective. Additionally, it is quite difficult to predict what the spike levels will be in the system until it is actually tested. Again, consideration should be given to the method of frequency control, since this will have an effect on the output noise. For example,
Figure Mapping Extraordinary Requirements to commonly available interface requirements Add "Interface" to each arrow Put in Sect 7.1