IEEE P1581 Static Component Interconnection Test Protocol and Architecture

Public Documents

This page allows you to download or view public documents related to the project.

• White Paper of the IEEE P1581 Working Group: An Economical Alternative to Boundary Scan in Memory Devices

• NEW VLSI Test Symposium 2007: IEEE P1581 - New Possibilities For Static Component Interconnection Test
• NEW VLSI Test Symposium 2007: State of the Art in MEMORY CLUSTER TESTING at Board and System Level
• NEW VLSI Test Symposium 2007: Challenges Related to Memory Cluster Tests
• Board Test Workshop 2006: Benefits of Board and System Level Memory Cluster Test with IEEE P1581
• Board Test Workshop 2006: P1581 - Recent Enhancements Expand Applicability
• Board Test Workshop 2006: Problems Using Boundary-Scan for Memory Cluster Tests
• Board Test Workshop 2006: Can IEEE P1581 Test Fully Buffered DIMMs?
• Board Test Workshop 2005: What is happening with IEEE P1581?, slides
• Board Test Workshop 2005: What is happening with IEEE P1581?, astract
• Board Test Workshop 2004: Transparent Test Mode (TTM), slides
• Board Test Workshop 2004: Transparent Test Mode (TTM), script
• Board Test Workshop - ITC submission 2002: P1581 status
• Initial idea and concept (2001): Short overview of the technology
• ITC paper 1999: Static Component Interconnection Test Technology in practice 
• ITC paper 1999: SCITT: a new technology for assembly testing

Back to Top