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*To*: "P.J. Sallaway" <pj@myricanetworks.com>, "Rao, Sailesh" <sailesh.rao@intel.com>*Subject*: RE: [10GBASE-T] question about the complexity reduction of MIMO*From*: "George Zimmerman" <gzimmerman@solarflare.com>*Date*: Wed, 22 Jan 2003 20:07:08 -0800*Cc*: "William Jones" <wjones@solarflare.com>, <xichen@marvell.com>, <stds-802-3-10gbt@ieee.org>*Sender*: owner-stds-802-3-10gbt@majordomo.ieee.org*Thread-Index*: AcLCj1bcOTZbByGRSpiMBnpn5miTHwAA8cNg*Thread-Topic*: [10GBASE-T] question about the complexity reduction of MIMO

I realize you guys are all curious, but I'm sure you're smarter than you are sounding. Most of you are undoubtedly familiar with many techniques for reducing computations in filter computations and for reuse of computations in MIMO type processing. If you are saying that the group has now gotten to the point where all that is needed to demonstrate technical feasibility is to get the ops count down, then we can focus on the computational complexity aspect. If the group really is at the point where all agree that feasibility is only a matter of the ops count, then we will be happy to engage in a discussion of reduction of the computational complexity. However, I suspect that there are other, less implementation-dependent matters to consider. George Zimmerman CEO & CTO, SolarFlare Communications 9501 Jeronimo Road, Suite 100 Irvine, CA 92618 gzimmerman@solarflare.com tel: (949) 581-6830 ext. 2500 cell: (310) 920-3860 -----Original Message----- From: P.J. Sallaway [mailto:pj@myricanetworks.com] Sent: Wednesday, January 22, 2003 7:27 PM To: Rao, Sailesh Cc: William Jones; xichen@marvell.com; stds-802-3-10gbt@ieee.org Subject: RE: [10GBASE-T] question about the complexity reduction of MIMO Bill, The 7X reduction in complexity (10 Tops to 1.5 Tops) as claimed by your MIMO realization is an important aspect of the technical feasibility of 10G-Base-T. Can you please provide sufficient details for the committee to verify the claim? Thanks, ...PJ On Wed, 2003-01-22 at 15:17, Rao, Sailesh wrote: > Bill, > > On Page 20 of your January tutorial presentation, you show that the > DSP complexity of the receiver in your proposal will be >40X the DSP > complexity of 1000BASE-T receivers in the market, assuming scalar > operations. It would be very difficult to justify the technical feasibility > of your proposal on this basis. > > On Page 25, you are claiming that there are MIMO realizations > possible that would render the complexity of the Matrix-Vector > multiplication (with a 4X4 matrix, and a 4X1 vector) needed for your > receiver to be equal to 1.5X that of a 1000BASE-T scalar operation, and > therefore the DSP complexity of your receiver is only 6X that of commercial > 1000BASE-T receivers. Aside from the matrix-scalar distinction, since the > 4X1 vector in your receiver uses 4 10-level symbols ranging over [-9, +9] > and since the 1000BASE-T scalar uses 5-level symbols ranging over [-2, +2], > this appears too good to be true. > > Can you please clarify your claims? > > Regards, > Sailesh. > > -----Original Message----- > From: William Jones [mailto:wjones@solarflare.com] > Sent: Tuesday, January 21, 2003 10:10 PM > To: P.J. Sallaway > Cc: xichen@marvell.com; stds-802-3-10gbt@ieee.org > Subject: RE: [10GBASE-T] question about the complexity reduction of MIMO > > > PJ, > > Answering your question first, the metric used in the tutorial was > operations/second. > > Regarding your comment, I agree that the complexity of a realization is a > concern for the group, but, not the realization itself. This distinction > avoids excessive consideration for vendor dependent issues which was what I > was trying to get at. So, I think it is not whether MIMO can achieve a 4x > or 16x reduction, but rather, that there exists at least one possible > realization of a particular technology that can achieve an acceptable level > of complexity. In the tutorial, we made the comparison to a multi-port > 1000BASE-T part. One can then argue feasibility by extension to a realized > solution. > > This leads to a question for the group. What strategy or steps are needed > to get to an agreement on technical feasibility? > > Bill > > -----Original Message----- > From: P.J. Sallaway [mailto:pj@myricanetworks.com] > Sent: Tuesday, January 21, 2003 10:24 AM > To: William Jones > Cc: xichen@marvell.com; stds-802-3-10gbt@ieee.org > Subject: RE: [10GBASE-T] question about the complexity reduction of MIMO > > > Bill, > > I believe the complexity of a practical realization is important to the > group as we look at the feasibility of 10 gigabits/second over Cat-5 and > the role that different line codes play. > > I am curious as to what complexity measure you are using when discussing > the 16x reduction using MIMO. Is it power dissipation for a given > technology? Multiplies per second? Gate count? > > Thanks, > > ...PJ > > On Mon, 2003-01-20 at 13:44, William Jones wrote: > > Xiaopeng > > > > I would claim the maximum is a 16x reduction. So, a practical realization > is in the range 4x to 16x. Our approach is somewhere around 7x. Note, a > MIMO realization is not unique. But, this is not a concern for the study > group. > > > > Bill > > > > -----Original Message----- > > From: xichen@marvell.com [mailto:xichen@marvell.com] > > Sent: Monday, January 20, 2003 10:24 AM > > To: William Jones > > Cc: stds-802-3-10gbt@ieee.org > > Subject: [10GBASE-T] question about the complexity reduction of MIMO > > > > > > > > Bill, > > > > I have a quick question about MIMO. In your presentation, you stated that > > the MIMO architecture can help to reduce the DSP complexity from 10 to > 1.5. > > > > For a 4x4 MIMO system, the maximum complexity reduction is 4 times if I am > > not wrong. In this extreme case, a one-channel DSP engine can be reused > > for 4 channels without any modification. However even in such a case, the > > DSP complexity is still 2.5. > > > > Xiaopeng > > > > -- P.J. Sallaway <pj@myricanetworks.com> Myrica Networks Inc.

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