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Re: [10GBT] Simulated Performance of RS (2048,1723) LDPC code

Never mind on the math part, I wasn't including the uncoded information
bits: 1723 coded + 1024 uncoded = 2749 info bits per block  (thanks to Bijit
Halder for pointing this out) which gets to your 20e12 total info bits.

The other questions on the simulation still stand, however.

  - Scott

-----Original Message-----
From: [] On Behalf
Of Scott Powell
Sent: Friday, September 17, 2004 11:07 AM
Subject: Re: [10GBT] Simulated Performance of RS (2048,1723) LDPC code

Hi Sailesh,
  I must have something wrong with my math, I'm not getting 20 trillion
(20e12) info bits from your numbers:

(7,302,369,000 blocks)*(1723 bits/block) = 12.58e12 information bits

If this is correct, the BER would be (18 errors)/(12.58e12 info bits) =
1.4e-12.  Close, but not quite yet to our goal.

Also, could you tell us:
1) how many bits you used in your fixed point arithmetic ?
2) how many iterations were used in the simulations ?
3) how many block errors resulted in the 18 bits errors ?

  - scott

Dr. Scott Powell
Senior Manager, Ethernet PHYs
Broadcom Corp.

-----Original Message-----
From: [] On Behalf
Of sailesh rao
Sent: Friday, September 17, 2004 8:39 AM
Subject: [10GBT] Simulated Performance of RS (2048,1723) LDPC code


We have just completed Sum-Product Algorithm simulations of the RS
(2048,1723) LDPC code at an SNR of 19.9dB with the PAM8 constellation. The
simulations were conducted both in 12-bit fixed point arithmetic using
4096-word lookup tables and in floating point arithmetic.

For 7,302,369,000 blocks at an SNR of 19.9dB, corresponding to 20.06
trillion information bits and 22.43 trillion coded bits, there were 18 bit
errors using fixed point arithmetic (for a mean BER estimate of 8.9E-13) and
0 bit errors using floating point arithmetic.


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