Thread Links Date Links
Thread Prev Thread Next Thread Index Date Prev Date Next Date Index

[8023-10GEPON] [FEC] upstream lock status



All,

Thanks to everyone for the productive and beneficial efforts in the FEC framing telecon and reflector discussions last week.

The following seems to be where things stand vis-a-vis upstream lock.  Please let me know if something is mischaracterized:

One point for clarification: we have one proposal which says that finding a 64bit sequence with more than 29bits Hamming Distance is difficult.  Another proposal says finding one with the 30bits is straightforward.    Is this discrepancy due to having a slightly different objective  - or perhaps a different set of assumptions?

- Jeff Mandin
PMC-Sierra


Issue 1.   Sync Pattern (for Gain Control and Clock Recovery at OLT):
----------------------------------------------------------------------------------------------------


    option A:    Repeated 0x55 (ie. alternating 1s and 0s) 

    option B:    Repeated newly specified 66b control block that will also be used for aligning OLT receiver to 66b boundary.  This codeword is DC balanced for smooth AGC and scrambling is not employed.  The control block has maximum run length of 3, but CDR is might still in some manner be less effective than with repeated 0x55.  The sync pattern has Hamming distance of at least 30 from all shifts of itself.



Issue 2.  Burst Delimiter
-----------------------------------

    option A:    64 bit "golden block" pattern (has Hamming Distance of 31 [or 29 anyway] from any shift of itself)

    option B:    66 bit codeword with high Hamming Distance from Sync pattern (eg. 64bit payload logically inverted)

    option C (suggested on reflector): shorter "golden block" pattern (similar to GPON) to reduce implementation complexity at OLT (if shorter pattern meets system requirements).


Issue 3. Transport (ie. "framing") of sync pattern and delimiter)
-------------------------------------------------------------------------------------------

    option A: "leader frame" scheme -> pretty much ruled out by the adhoc

    option B: sync pattern and delimiter words are carried in a datastream of 66b blocks in which FEC and scrambling are disabled.  FEC and scrambling 
	      are activated in the transmitted datastream following transmission of the FEC Codeword Delimiter 66b control block.

    option C (from "superframe.ppt" proposal): Burst begins with Sync Pattern and Burst Delimiter transmitted in unadorned manner.  FEC and scrambling
	      are activated in the transmitted datastream immediately following transmission of the FEC Codeword Delimiter pattern.


Issue 4.  OLT frame synchronization sequence
--------------------------------------------------------------------

    option A: One-step locking in the following sequence:

	   * ONU transmits multiply repeated sync pattern on the upstream

	   * OLT performs automatic gain control

	   * OLT performs clock and data recovery sequence

	   * zero or more bits from the multiply repeated sync pattern are received by the FEC/PCS layer at the OLT

	   * OLT PCS layer performs bit-by-bit correlation to compare the received datastream to the FEC Codeword Delimiter pattern.  When the 
	     Hamming Distance between the received datastream and the FEC Codeword Delimiter is less than "Threshold", then FRAME LOCK is declared.

	    * OLT expects the next received bit to be the first bit of the first scrambled 66b block of a FEC Codeword



    option B: Two-step locking in the following sequence:

	   * ONU transmits sync pattern blocks on the upstream

	   * OLT performs automatic gain control

	   * OLT performs clock and data recovery sequence

	   * One or more instances of the entire sync pattern block is received by the FEC/PCS layer at the OLT

	   * OLT PCS layer performs bit-by-bit correlation to compare the received datastream to the sync pattern block.  When the 
	     Hamming Distance between the received datastream and the sync pattern block is less than "Threshold", then BLOCK LOCK is declared.

	   * OLT expects the next received bit to be the first bit of an unscrambled 66b block

	   * OLT PCS layer performs block-by-block correlation to compare the received datastream to the FEC Codeword Delimiter pattern.  When the 
	     Hamming Distance between the received datastream and the FEC Codeword Delimiter is less than "Threshold", then FRAME LOCK is declared.

	   * OLT expects the next received bit to be the first bit of the PCS data (putting aside the scrambler init issue for the moment)