Re: [8023-10GEPON] change in sync pattern (preamble)
Mike provided a good point, but if check the specs of existing deployment, such percentage already much higher than 1% when taking into account of ethernet frame. How come that wasnot raised as an issue?
Its true this situation will be worse for 10G option. My understanding sometimes other patterns such as long 1's followed by long 0's do facilitate quick amplitude recovery/restoration and/or dynamic level detection, especially for options other than EPON. But still we need to have strong reason to trigger this switch, especially welcome input from systems or carriers, which may be also involved to go back to modify the existing deployment.
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From: Mike Dudek [mailto:Mike.Dudek@xxxxxxxx]
Sent: Thursday, July 03, 2008 9:07 AM
To: STDS-802-3-10GEPON@xxxxxxxxxxxxxxxxx
Subject: Re: [8023-10GEPON] change in sync pattern (preamble)
I'm been lurking on the reflector without following closely so I apologize if what I say is not relevant. 1010 patterns are a disaster for EMI if they persist for long periods of time. If the 1010 content is only sent 1% or some other low percentage of the time in any normal operating situation it won't matter. (eg if the pre-amble is only at the front of a data block that is always longer than 100 times the length of the 1010 pattern even in idle situations with the rest of the data block being scrambled or PRBS like.)
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From: Jaime Kardontchik [mailto:jaime@xxxxxxxxxx]
Sent: Wednesday, July 02, 2008 7:36 PM
To: STDS-802-3-10GEPON@xxxxxxxxxxxxxxxxx
Subject: [8023-10GEPON] change in sync pattern (preamble)
Dear Task Force members,
Recently it has been proposed to change the sync pattern (Preamble) from the periodic 101010 ... pattern to a non-periodic "data-like" pattern. I am afraid that this might affect negatively one of the main purposes of having a preamble, clock recovery, as well as its associate parameter: the locking time.
As was pointedly stated in 3av_0805_effenberger_3.pdf, the periodic 101010... pattern is the "golden" pattern for clock recovery and it also has the advantage that it does not discriminate between any specific implementations, neither present nor future, which is a very good feature for a Standard.
Changing to a "data-like" pattern preamble will clearly affect the locking time which will become longer, since the number of transitions (or updates for the phase-locked-loop) will be less. In some situations, where the BER (before FEC) might be marginal, it might even lead to catastrophic failure of the clock recovery system.
Regards,
Jaime Kardontchik
Kawasaki Microelectronics