Re: [10GMMF] TP-3 Stressors
I think the priority in the PAR which you did not call out is indicated by
the word "support" and its application to the updated length of 300m.
I do not think that "supporting 300m" is a detail which can be overlooked.
And I think any argument about the ever-advancing capabilities of silicon
works in favor of keeping the stressors at the higher PIE-D levels.
Robert Lingle, Jr, Manager
Fiber Design and Transmission Simulation
OFS R&D, Atlanta, GA
From: Piers Dawe [mailto:piers_dawe@AGILENT.COM]
Sent: Tuesday, April 19, 2005 10:19 AM
Subject: Re: [10GMMF] TP-3 Stressors
The more you stand back from the detail, the easier it is to understand!
Item 14 of the PAR says:
14. Purpose of Proposed Project:
This project will define a lower-cost, 10Gb/s serial PHY that supports a
link distance of at least 220m over installed FDDI-grade multimode fiber.
The specification should enable migration to smaller form factor pluggable
As I see it, our priorities are:
Acceptable heat and size possibilities
This means we must set the bar to what is practicable and high yielding in
2005. We don't have to agree whether any limitations are "fundamental". We
don't (and cannot precisely) tie TP3 testing to coverage in the field. We
know that for any performance level, somebody somewhere can say "if you had
made performance a little better my old fiber would have worked with LRM".
We should not be diverted by such objective creep because it is a journey
with no end.
All, we need to do more to show what is practicable. In particular, we need
to prove by experiment that we have a correct and viable combination of
noise loading and stressors in the TP3 test. Until we have factored noise
loading in, we cannot sign off the stressors.
> -----Original Message-----
> From: owner-stds-802-3-10gmmf@IEEE.ORG
> [mailto:owner-stds-802-3-10gmmf@IEEE.ORG]On Behalf Of Norman Swenson
> Sent: 18 April 2005 21:40
> To: STDS-802-3-10GMMF@LISTSERV.IEEE.ORG
> Subject: [10GMMF] TP-3 Stressors
> I would like to better understand the position of those
> advocating a limit of PIE-D in the range of 3.8-4.0 for the
> TP-3 stressor selection. I believe we can make progress on
> the reflector versus taking up weekly TP-3 call time to
> debate this issue.
> So far, as I understand the arguments for a PIE-D of 3.8-4.0,
> they are:
> 1) Real-world fiber will show dynamic variation in IPR
> that will degrade equalizer performance compared to that
> measured with a static TP-3 test, which somehow leads to a
> cliff in real-world performance if we set the PIE-D value too
> high in the TP-3 stress test
> 2) Cost-effective and power-efficient EDC chips can be
> produced that achieve performance in this range
> Argument (1) would seem to push for higher performance
> requirements in the static TP-3 test, since margin must be
> built into the static test to allow for unmodeled dynamic impairments.
> Argument (2) has been put forward as though there is some
> fundamental limitation that prevents cost-effective and
> power-efficient EDC chips from being produced that can
> equalize PIE-D values higher than 4.0 dB. I am very
> interested in learning more about the theoretical or
> experimental basis for concluding that cost-effective,
> power-efficient EDC chips cannot perform beyond the 3.8-4.0
> dB range that has been proposed as a performance metric.
> Until recently, the committee has focused on quantitative
> analysis to determine performance requirements for EDC based
> on theoretical models and measured data of optical fiber,
> with an implicit, if not explicit, goal of 99% coverage of
> 300m OM-1 fibers. Lately, there has been a shift away from
> considering the percentage of the installed base that can be
> covered to setting PIE-D objectives independently of coverage
> requirements. I do not understand the significance of PIE-D
> requirements if they are not put in the context of the
> percentage of the installed base that the PIE-D corresponds
> to. Without such context, the numbers can be arbitrarily
> chosen without any real-world significance.
> Thanks to any who can help me better understand the arguments
> for setting PIE-D limits to such a low value compared to that
> required to achieve 99% coverage.