RE: 10G-BASE-T question (dd1)
- To: "Grow, Bob" <bob.grow@xxxxxxxxx>, "'dan_dove@xxxxxx'" <dan_dove@xxxxxx>, stds-802-3-hssg@xxxxxxxx
- Subject: RE: 10G-BASE-T question (dd1)
- From: ldmiller@xxxxxxxxxxxxxxxxxx (L D Miller)
- Date: Tue, 08 Jun 1999 11:33:39 -0700
- Sender: owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx
Spoken like a trooer who now has access to 1.25G logic, Bob!
At 10:25 AM 6/8/99 -0700, Grow, Bob wrote:
>I don't share your primary concern (at least in perceived magnitude). An
>8-bit interface is already included in the standard (GMII), all that need
>change is the clock rate (not something subject to discriminatory
>licensing). A wider interface presents more constraints, and if wanted as
>an option must be used in evaluating a number of the PHY proposals. (A wider
>interface can affect preamble, IPG, and latency at a minimum.)
>From: Dan Dove [mailto:dan_dove@xxxxxx]
>Sent: Tuesday, June 08, 1999 9:22 AM
>Subject: Re: 10G-BASE-T question (dd1)
>Actually, I would be happy if we architected a solution that allowed us
>to set the width/clock-rate at initialization. This way, we could use
>a 32 bit wide implementation in early implementations, and possibly an
>8 bit wide implementation later. Whether this is a hard configuration or
>negotiable via MDIO/MDC is negotiable.
>My primary concern is that we not standardize an obsolete technology
>that ends up being superceded by a proprietary implementation that
>does not have the rigorous design, or non-discriminatory licensing of
>an IEEE standard.
>I believe a small amount of foresight in the development of this
>standard will save us a lot of pain in the future.
>_________ _/ ___________ Daniel Dove Principal Engineer __
>_______ _/ ________ dan_dove@xxxxxx LAN PHY Technology __
>_____ _/ ______ Hewlett-Packard Company __
>____ _/_/_/ _/_/_/ _____ Workgroup Networks Division __
>____ _/ _/ _/ _/ _____ 8000 Foothills Blvd. MS 5555 __
>_____ _/ _/ _/_/_/ ______ Roseville, CA 95747-5555 __
>______ _/ ________ Phone: 916 785 4187 __
>_______ _/ _________ Fax : 916 785 1815 __
>__________ _/ __________________________________________________________
>> The figure on page 4 emphasizes more the maximum clock used in the
>> 10G-BASE-T architecture, 1.25 GHz, and the maximum baud rate
>> in the optical fiber, 1.25 Gbaud/sec.
>> The actual width of the MII interface is a question open to discussion.
>> Shimon Muller (Sun) suggested using a 32-bit wide interface (64-bit
>> wide if we include both the Tx and Rx). Dan Dove (HP), in the audience,
>> suggested that if we use a 32-bit wide interface we might end up with
>> a chip that is all I/Os surrounding a tiny design, and he suggested to
>> take here an agressive approach and stick to an 8-bit wide interface.
>> I tend to agree with Dan for the same reason and for another one:
>> 32 TTL-type output drivers at the Rx would introduce a lot of
>> switching noise that could affect the analog blocks in the chip,
>> including the jitter of the transmitter.
>> Jaime E. Kardontchik
>> Micro Linear
>> San Jose, CA 95131
>> email: kardontchik.jaime@xxxxxxxxxxx
>> "Rogers, Shawn" wrote:
>> > Jaime, I have a question concerning your presentation in Idaho. On page
>> > of your presentation you state the following when comparing your
>> > proposal to 802.3ab (1000Base-T):
>> > 1000Base-T 10G-Base-T
>> > GMII-8bit wide 10GMII - same
>> > Are you advocating a byte wide chip-to-chip interface between the PCS
>> > Reconciliation sublayer in the MAC running at 1.25Ghz?
>> > Regards,
>> > Shawn
>> > -----Original Message-----
>> > From: Jaime Kardontchik [mailto:kardontchik.jaime@xxxxxxxxxxx]
>> > Sent: Monday, June 07, 1999 5:57 PM
>> > To: stds-802-3-hssg@xxxxxxxx
>> > Subject: 10G-BASE-T presentation
>> > Hello 10G'ers,
>> > For those that were not able to attend the Idaho meeting:
>> > The presentation on the 10G-BASE-T architecture given
>> > in Idaho included more material than the original posted
>> > two weeks ago.
>> > The updated presentation as given in Idaho is now in the
>> > web site, replacing the old one:
>> > http://grouper.ieee.org/groups/802/3/10G_study/public/june99
>> > Jaime
>> > Jaime E. Kardontchik
>> > Micro Linear
>> > San Jose, CA 95131
>> > email: kardontchik.jaime@xxxxxxxxxxx