Re: Hari and train-up sequences
I am confused here. Is Hari being proposed as a PHY for the LAN compatible PHY of
10GbE? I have recognized that Hari only needs the WWDM optical interface to be a 4
wavelength parallel short reach PHY. When it was first presented, the way that it
was presented reminded me of a "solution looking for a problem". It certainly looks
like there are a lot of people have been working on this for some time. All of the
conversations on the reflector are starting to treat Hari as a PHY, not a device
interconnect. I am confused why an interconnect suitable to be a full LAN PHY would
be proposed first as a device interconnect. As a 500m and less LAN PHY, I am
neutral on Hari. As something else, I confused by the way it was presented and have
my doubts as to the overall impact of Hari as a device interconnect and the
limitations that it inherently makes on the PCS/PMD relationship.
Hari as a device interconnect requires specific functionality. It forces the
physical coding functionality of non parallel PHYs to exist at the PMD, not the
PCS. I have been told by a Hari supporter that the PCS/PMA/PMD relationship is
purely for the standard and has little relationship to how protocols are implemented
and devices are actually designed. If device and protocol implementation has little
to do with the standard, why have the standard? If the protocol implementation is
specific to the standard, then Hari is a PCS specific to a particular PHY and is
exclusive of other PCS definitions for other PHY definitions.
If Hari is a PCS, let us recognize it as such and move on with other PHY
definitions. If it is not a PCS then let us recognize that it will alter the nature
of the relationships of the PHY functionalities for the non-WWDM PHYs dramatically.
A silicon designer can best determine if the increase in complexity of the PMD is
countered by the pin count benefits of Hari as something other than a PCS. Hari as
a device interconnect needs to be removed from the table. Hari as a PCS, with minor
modifications can be evaluated as such.
Rich Taborek wrote:
> The purpose of this note is to clear up confusion regarding Hari, a
> proposed 4-lane serial interface for 10 GbE and train-up sequences.
> It should be clear that NO TRAINING SEQUENCES are proposed for Hari.
> Both the "Hari Coding Objectives" presentation
> and "Word Striping on Multiple Serial Lanes"
> make a point of noting that no train-up is required Hari to deskew.
> The Hari Coding Objectives proposal uses the standard Idle sequence
> proposed by Howard Frazier of Cisco to deskew multiple parallel lanes
> while simultaneously acquiring code-group synchronization on all lanes.
> Best regards,
> Richard Taborek Sr. 1441 Walnut Dr. Campbell, CA 95008 USA
> Tel: 408-370-9233 Cell: 408-832-3957 Fax: 408-374-3645
> Email: rtaborek@xxxxxxxxxxxxx