Roy Bynum wrote:
> Is or is not Hari a 8B10B encoding method? Is 8B10B the same encoding method that
> has been suggested for the WAN PHY? If not, then there must be some sort of
> translation, almost another MAC bridge to take the 802.3 frames from the Hari
> interconnect and put them into another encoding method. Are you suggesting that we
> create another, secondary, MAC bridge just to support a different PHY? Was this
> what was presented at York? I don't think that is what is in the objectives.
For the LAN PHY both Serial and MAS PMD proposals have been aired which translate quite
seamlessly between the MAC's Parallel 10 GMII, Hari and Serial or MAS encoding. No
bridge is required and the implementation is potentially simpler than that associated
with a high-speed, clocked, parallel bus. Hari was presented in York as the Serial 10
GMII by Howard Frazier. What objective is in question?
> As for real estate on the PC board. Vendors need to think about reducing the size
> of their boards and systems. More and more floor space is being taken by these
> systems as well as power and cooling. Reducing the size of the boards, reducing the
> amount of electronics, reducing power requirements, and increasing the density of
> the connections is becoming an issue in large installations, like those that will
> use P802.3ae. Hari tends to take exactly the opposite direction in system design.
> Hari makes it easy for the system designer to become sloppy, not requiring them to
> become tighter and better.
So you're saying that a 16-bit + clock 622 MHz interface will help reduce system and
board size more than a 4-bit self-timed Hari interface. I don't understand your logic.
Sloppy 10 GbE designs won't work nor be competitive in the marketplace. Period.
> Thank you,
> Roy Bynum
> Fred Weniger wrote:
> > Dear Ladies and Gentlemen:
> > Before we commence constructing a DMZ between the LAN and WAN 10GbE camps,
> > may I remind one and all that Vitesse offered a proposal at the Kauai HSSG
> > which we believe will provide an alternative path to peaceful
> > co-existence. Our proposal allowed the MAC to run at 10 Gb/s, and
> > suggested a "pause" or "rate-match" function on the XGMII to allow HARI to
> > run at 2.9952 Gb/s on each of the four lines if it is intended for WAN
> > connection. We stated that a HARI to SONET LITE framer could be
> > implemented in CMOS, and could use the OIF-proposed standard 16- bit Serdes
> > to serialize the date in an OC-192 COMPATIBLE format. We, as chip makers,
> > believe this is quite achievable, and provides both camps with what they
> > want. If there are those who disagree, please reply.
Richard Taborek Sr. 1441 Walnut Dr. Campbell, CA 95008 USA
Tel: 408-330-0488 or 408-370-9233 Cell: 408-832-3957
Email: rtaborek@xxxxxxxxxx or rtaborek@xxxxxxxxxxxxx