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Re: HARI Systems Design

Larry, et al,

The presentation below, given at the November HSSG, shows 3.125Gbaud
signals thru 20 inches of FR-4 PCB plus two (SMA) connectors plus 1M
of cable plus a BGA socket.  The eye opening shown should not pose
a challenge to any reasonable serdes.  The circuit technique LSI uses 
to open the eye is pre-emphasis.  Other vendors use post-emphasis, 
but same result, I'm sure.

Admittedly, this is nominal hardware, but no exotic materials.  
I believe that not much frequency content above 1.5G is needed for a 
good signal at 3G (as the waveforms in the presentation suggest).  
As the HARI electrical spec evolved, admittedly, I, too, was concerned
about the relative loosening of the impedance tolerance.  I tried
to show a problem with simulations, but could not.  The most relevant
electrical spec to limit reflections is the return loss, which 
effectively constrains capacitive and inductive parasitics as well
as line mismatch.  I think the HARI electrical spec has it about
right (and I am a veteran of MANY applications of our gigabit and 
two gigabit serdes).

All the above is not meant to say there are no problems in HARI.
As one of the loyal opposition within HARI, here is my standard rant:
The coding scheme as presently defined is "byte striped".  That is,
serdes can discern no larger group than 10 bits.  The data path per
HARI lane is then 1-byte wide, running at 312 MHz.  Deskew will
require parallel operations across all four (skewed) lanes at this
speed.  This is going to cause considerable implementation pain.
Both Gigabit Ethernet and Fibre Channel architectures to date
permitted at least 2-byte wide data paths.  This scheme will not.
To coopt Joel's aphorism, the ASIC designer will have to "come up 
with last minute desperate solutions to impossible problems caused 
by the System Architect."

For an alternative coding proposal ("word striped") founded on 
considerable experience, please see:

Mike Jenkins

Larry Miller wrote:
> How long of traces are you getting on FR-4? Have you actually fabricated
> these?
> Our network analyzer tests indicate that FR-4 dies horribly (lossy) above
> about 1.5 Gb/s. By the time we get to 3 GHz all the analyzer is displaying
> is the analyzer receiver input noise, looking in vain for signals......
> (HP8752C)
> Your Tricks & Tips look like they would help, but I would be very
> interested in hearing from anyone who claims to have successfully used FR-4
> in 5+ GHz circuits over more than 3-4 inches and, if so, what kind of signals.
> Thanks,
> Larry Miller
 Mike Jenkins               Phone: 408.433.7901            _____     
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