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Re: Hari

Roy Bynum wrote:

> Rich,
> As a XGMII, replacing the parallel GMII, Hari would be in place to directly interface
> between the MAC and PCS.


I think I understand your concerns now! You have made the assumption that Hari is proposed as
a Parallel 10 GMII (XGMII) replacement. This is absolutely not the case. The Parallel 10GMII
is a 36-bit parallel interface + clock proposed by Howard Frazier of Cisco. It is proposed as
the interface between the MAC and PCS. It has nothing to do with Hari. Please review starting on
page 4. Hari, on the other hand, is the same as the proposed Serial 10 GMII interface, which
starts on page 11.

> As an interconnect between the PMA and the PMD, Hari adds
> additional code translations, jitter, and inherent delay between any pacing function at
> the PMD level PCS and the MAC.  That inherent jitter and delay will require fifo buffers,
> buffer control, frame queuing, queue control, isolated timing recovery, timing control,
> and other functions that are really inherent to a two port MAC bridge, in order to
> implement the objective of a WAN PHY.  It was my understanding that the proposal in York
> was for the MAC bridge between the LAN PHY and the WAN PHY to be at the MAC layer, not
> the PMD layer.

As an optional interface for the LAN PHY, Hari does not seem to affect the WAN PHY in any
way. Simply don't use it for the WAN PHY. Frankly I don't understand any of your rantings
about Mac bridges, frame queuing, etc. with respect to Hari. I could ask you to elaborate on
these, but I won't. Just don't use Hari if you don't like it.

Hari is a far and away a superior PMA to PMD interface than the 17-bit parallel interface @
622 MHz proposed as the WAN PHY PMA to PMD interface. I would support your interface as an
optional interface for the WAN PHY. However, I need a usable solution for the LAN PHY. Hari
is it. Propose another one that works if you don't like Hari.

If I were interested in developing a WAN PHY, and in consideration of several products
employing multiple WAN PHYs, I would consider Hari over the traditional 17-bit parallel
interface @ 622 MHz interface for the very same reasons I like it for the LAN PHY.

> As a system implementation function, Hari can be independently implemented by designers
> for their LAN PHY implementation.  Hari, as a PMA/PMD device interconnect should NOT be
> part of the P802.3ae standard.

I know that many chip vendors, system houses and HSSG members like Hari. That was clearly
evident in Kauai. Any interface garnering this much support that enables all LAN PHY PMDs
should clearly be standardized for the sole purpose of guaranteeing interoperability among
multiple suppliers. Isn't this one of the main reason we're meeting, have started a new
standards effort and are discussing proposals and issues over this reflector? I fully support
its standardization as an optional interface. Optional only because I can conceive of
implementations which don't need to use this interface at all (i.e. PMD functions integrated
with PMA).

>  Hari should be part of a different standard as a PHY
> specific to PC Boards and backplanes.  I believe that Hari has the potential to increase
> backplane capacity well beyond the requirements of 10GbE.

Please feel to propose Hari as part of other standards. BTW, InfiniBand is also pushing it
for PC Boards and backplanes and has firm plans for a 12-lane (30 Gbps) interface.

> As for my concerns about how it was presented, I am referring to it being presented first
> as an XGMII between the MAC and the PHY, then shifting to be between the PMA and the
> PMD.

I sincerely believe that you're confused about the location of Hari in the protocol stack and
I've tried my best with words and pictures to clarify your understanding. Once again, Hari is
the same interface as the Serial 10 GMII proposed by Howard Frazier of Cisco in Montreal and
Hari was never proposed for the XGMII. You must be thinking of Sali. Please review in detail.

If you believe you are correct, please identify the HSSG presentation where Hari, or the
Serial 10 GMII was proposed as an interface "between the MAC and the PHY" as you indicate. I
can't seem to find it. However, I believe that you and other are using and have used XGMII as
a reference to the Parallel 10 GMII presented by Howard...

> This tells me that certain vendors have already designed their MAC/PCS/PMA ASICs
> with Hari and now have to cover themselves.  They are attempting to force this
> implementation practice within the P802.3ae standard, limiting other vendors with other
> implementation practices.  They are doing this of the expense of the agreed on WAN PHY,
> which they really don't want anyway.

Once again, Hari is a formal proposal to the HSSG for the Serial 10 GMII which is a arguably
the most critical and potentially the only non-internal-chip interface for the 10 GbE LAN
PHY. It's not meant to limit the WAN PHY in any way. Take a good look at it, you may like
what you see. I see no reason why scrambled data can not be passed across Hari. Once again,
if you don't like it, propose an alternative that works for the LAN PHY.

> I understand that this type of attempted standardization has happened before, at the
> eventual expense of the vendor that made the attempt.  I realize that the SAN Fiber
> Channel people would like to see Hari standardized on by the 802.3 to keep up with SCSI,
> but this is not part of the Fiber Channel standards organization.  I realized that
> optical device vendors would like to have a common optical transceiver interface, but
> with the WAN PHY, this will not happen, even with Hari.  I realize that as a
> backplane/bus interconnect PHY, Hari would work well as a high speed replacement for PCI,
> but this is not the forum to address that issue.  I think that I am well aware of the
> real issues with Hari.  I also think that P802.3ae is not the place to address those
> issues.

I agree 100%. That's why the Hari idea was starting in 802.3 as the Serial 10 GMII in
Montreal in July, worked with other standards and industry bodies outside 802.3 in an attempt
to achieve multi-protocol consensus, and the consensus was brought back into 802.3 in Kauai
in November. Hari is a model of cooperation and openness within and outside of 802.3 and I am
very proud to be associated with its development.

Please analyze your paragraph above. You say Hari is a great interface for the Fibre Channel,
backplane interconnects, common optical transceivers, high speed PCI replacements, etc. It
sounds like you believe that Hari is a heck of an interface and benefits the communications
interest and all mankind. However, even though the Hari effort started in the 802.3 HSSG, you
go on to say that Hari should be excluded from P802.3ae. ...and your reason is???

It seems from your Hari threads that your ulterior motive is to prevent or disrupt any
development on the LAN PHY and to promote the WAN PHY as the ubiquitous solution for 10 GbE.
Is this the case? Or do you believe that there's a place for the LAN PHY? If the answer to
the latter is yes, then what interface should the LAN PHY use between and integrated MAC/PHY
(includes PCS) and the PMD?

> Thank you,
> Roy Bynum
> Rich Taborek wrote:
> > Roy,
> >
> > - Hari has been proposed as a 10 GbE interface in Kauai. What exactly is your concern
> > with the process?
> > - Hari is not being proposed as a backplane interconnect 10 GbE. However, it is for
> > at least InfiniBand.
> > - Hari is the same as the Serial 10 GMII proposed by Howard Frazier of Cisco in
> > Montreal. I assume that this is what you mean by "XGMII". Why do you say that the
> > XGMII did not preclude the existence of other PHY's and Hari does?
> > - Hari can easily support a pacing mechanism. Would you like me to architect one for
> > you?
> > - Which PHY do you believe is being "back doored" before the 802.3ae Task Force is in
> > place? Is it the LAN PHY? If this is the case I have to disagree on the grounds that
> > Hari is equally applicable as a PMA to PMD interface for 4 quite disparate LAN PMD
> > alternatives, 2 of those which may strip off the Hari 8B/10B code and apply a
> > significantly different and scrambled line code to a serial stream.
> > - The interface for which Hari is proposed may well we the only non-internal chip
> > interface in a mature 10 GbE products. As such, this interface is clearly one which
> > should be considered for standardization.
> >
> > Best regards,
> > Rich
> >
> > --
> >
> > Roy Bynum wrote:
> >
> > > Rich,
> > >
> > > I saw a lot of confusion in the presentations of what Hari is intended
> > > for.  One presentation used Hari as a backplane interconnect.  There is
> > > confusion on the reflector.  There IS a lot of "support" for Hari from
> > > vendors that want to stay on the good side of a particular vendor.
> > > Otherwise, I suspect that there is a lot of concern about the way that
> > > Hari has been brought to the HSSG.
> > >
> > > When Hari was first introduced at York, I thought that it was a proposal
> > > for a an XGMII.  While I did not actively support it, as a XGMII it did
> > > not preclude the existence of other PHYs.  It could be modified to
> > > incorporate a pacing mechanism between a PHY and the MAC.  The PHY would
> > > still implement the PCS/PMA/PMD for what ever standard the Task Force
> > > decided on, even the one from Korea.
> > >
> > > As far as I am concerned, any chip maker/system designer that wants to
> > > use Hari can.  I just don't want to see it standardized as the PCS to
> > > PMD interconnect, even as an optional.  The HSSG is not the correct
> > > forum to be doing implementation practices or standards.  That was one
> > > of the things that was impressed on me at the June meeting.  There is
> > > enough disparity between the PHYs to cause a major rift if a PHY
> > > implementation standard is decided on before the PHYs are even defined.
> > > Unless a particular vendor is doing their best to back door a PHY
> > > standard before the Task Force is even in place, there is no need to
> > > decide on implementation practices before the PHYs are fully defined.
> > >
> > > Thank you,
> > > Roy Bynum
> > >
> > > Rich Taborek wrote:
> > >
> > > > Roy,
> > > >
> > > > Multiple proposals aired in Kauai and I have already explained that
> > > > Hari is simply a "better" interface for attaching a MAC/PCS/PMA to a
> > > > PMD. As Dan Dove of HP has explained, Hari would at most be an
> > > > optional interface as was the case with both the TBI (closest Hari
> > > > equivalent in GbE) and GbE's GMII. Hari is a serial-based interface,
> > > > and as such requires a transmission code. 8B/10B was deemed to be the
> > > > best choice for Hari. That's it! I encourage you to propose a better
> > > > interface than Hari for its intended purpose or a better transmission
> > > > code for Hari. In the absence of either, I saw an awful lot of support
> > > > for Hari in Kauai and will continue to do my best to improve upon the
> > > > current proposal.
> >
> >   ----------------------------------------------------------
> >
> > Richard Taborek Sr.   1441 Walnut Dr.   Campbell, CA 95008 USA
> > Tel: 408-330-0488 or 408-370-9233           Cell: 408-832-3957
> > Email: rtaborek@xxxxxxxxxx or rtaborek@xxxxxxxxxxxxx

Best regards,


Richard Taborek Sr.   1441 Walnut Dr.   Campbell, CA 95008 USA
Tel: 408-330-0488 or 408-370-9233           Cell: 408-832-3957
Email: rtaborek@xxxxxxxxxx or rtaborek@xxxxxxxxxxxxx