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Re: Give me serial 10GbE or.......


A thread off of Rich's response ......

> > >c) The ability to use common PCB material to to build 10 Gbps products;
> >
> > -------------------------------------------------------------
> > No problem.  If we obey the "short is good" rule of RF
> > and microwave layout, runs of 1-2 inches can be accomodated
> > between the transceiver and the ASICs.  If one makes use of
> > buried stripline and blind vias, one extends this a bit further
> > without difficulty.  FR-4 will support this just fine.
> > -------------------------------------------------------------
> I'm out of my league here. I'll leave this to the Ron Miller's, Joel Goergen's,
> Michael Fogg's, Rich Feldmen's, etc. for comment.

I just don't know, here.  I have thought about this alot and I am thinking, if we head
in this direction, that I/we should come up with a test card with the purpose of
evaluating the contribution of the '2 inch' or 'x inch' 10gig fr-4 segment from a xcvr
to a phy in the jitter budget.  My feeling at this point is that fr-4, excuse me, that
the geometry and construction of an fr-4 model will yield significant Dj and ISI
contribution where during the gigabit times, this was some what small and easy to
slide into the T1 or T4 portions - more or less ignoring it.

I will admit that I understand the effects of 8b10b over geometry, but I know not what
some of the new enc/dec concepts will look like - and I need to examine this in the
lab before I could offer any more input on possible jitter contributions.

I think we may have to add a column or two in the jitter budget for the board, but I
just don't know.  Something along the lines of what Rich discussed in the presentation
he gave in Kauia.

Take care