I don't recall these issues being asked, but does anyone know
Layout. Will Hari implementations be physically implemented as TxRxTxRxTxRxTxRx (as an ASIC guy might do putting 4 transceivers next to each other), or will they be done as TxTxTxTxRxRxRxRx (like an optics house might like to do with a parallel integrated driver or TIA/LA)?
Bill Woodruff ph: 805 496-7181 x14
GiGA North America Inc. fax: 805 496-7507
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