RE: XGMII repeater
A pkg about 208 balls, 1.0 mm BGA seems like
a great choice.
Since this interface is source synchronous,
your distance is mainly limited by, SSO noise,
cross talk, and edge degradation.
We have quite a bit of design experience
using impedance controlled I/O. I would feel
comfortable with a target of 10-15 inch traces for
a 32 bit single ended XGMII interface, using HSTL or
impedance controlled interface.
From: Booth, Bradley [mailto:bradley.booth@xxxxxxxxx]
Sent: Tuesday, March 21, 2000 10:44 AM
Subject: RE: XGMII repeater
From my count, this repeater would have 74 pins in each direction, for a
total of about 148 pins. With the power and ground requirements, the
repeater device would most likely use a 208 pin package. Going 10 inches on
a server motherboard would require 4 of these repeater devices plus the real
estate for the 76 PCB traces and the device.
I know I'd have a tough time trying to convince my customers that this is a
better solution than XAUI. For the same implementation, two XGXS devices
and 16 PCB traces to do the same thing is simpler and lower cost. I know my
customers like things to be simpler and less expensive.
From: Curt Berg [SMTP:cberg@xxxxxxxxxxxxxxxxxxx]
Sent: Tuesday, March 21, 2000 10:02 AM
Subject: XGMII repeater
XGMII is basically source synchronous,
(don't know how the pacing will be done).
To me this means an inexpensive extender/repeater
chip can easily be built.
If we use an HSTL, or impedance controlled
driver for XGMII, it should be possible to extend
the bus with several hops, and even through connectors.
At these baud rates (312.5M) it might even be possible to
retime the data without PLLs.
My conclusion is that physical distance on XGMII should not
be a big issue.