Thread Links Date Links
Thread Prev Thread Next Thread Index Date Prev Date Next Date Index

Exposed XGMII

Hi Ben,

Vitesse has chip with GMII interface and there are PHYs (National including)
which talk to it. It does not have to be exposed at connector level or does 
it ? Is there a standard definition of "exposed" ? In any case I, meant at 
pin level of a chip.


At 02:32 PM 3/24/00 -0500, you wrote:

>The MII is an example of an exposed interface because it has a
>connector specified and the UNH IOL can test to it.
>The GMII is not an exposed interface since it is impossible
>for UNH IOL to test to it. It is a convenience for the purpose
>of writing the standard and (perhaps) for vendors to design
>parts to the interface (though I don't know of any PHYs which
>support this).
>The XGMII will be similar to GMII, not MII. It won't be an
>exposed interface and I doubt a connector will be specified
>for it (since we're argueing about how few inches it can
>Devendra Tripathi wrote:
> >
> > Hi,
> >
> > Even though I find some comments from Roy a little pessimistic, I too get
> > confused sometimes
> > by different comments from different people. Could we state clearly that
> > XGMII is a possible
> > "exposed" interface, on the lines of MII/GMII and also that UniPHY
> > architecture is consistent
> > with it (I think Howard already said this earlier).
> >
> > Thanks,
> > Tripathi.
>Benjamin Brown
>Router Products Division
>Nortel Networks
>1 Bedford Farms,
>Kilton Road
>Bedford, NH 03110
>603-629-3027 - Work
>603-624-4382 - Fax
>603-798-4115 - Home