Re: Single ended XGMII
> I would also vote for single ended SSTL_2 or HSTL for XGMII. Currently all
> SerDes HSPI compliant are SSTL_2 which operate at 250 Mb/s. As we move up in
> the speed 500-1000 Mb/s we need to consider HSTL or STTL_1 (does not exist).
> However if you scale the SSTL2 levels to 1.5 volts you will get HSTL levels.
SSTL-2 is a pretty good bet. SSTL-1 (actually SSTL-18 or some such; I
think I'll push for -18 to keep it simple ) doesn't exist now but will before
long thanks to DDRII memory. Which also means that there will be plenty of
Also keep in mind that SSTL-18 will be PVT compensated and include a variant
for reflected-wave operation, thanks to the small-system outfits like the
graphics shops and Transmeta. That will make for an almost perfect match with
network back-end applications.
D. C. Sessions
Chair, JEDEC JC-16
> > From: Curt Berg <cberg@xxxxxxxxxxxxxxxxxxx>
> > To: HSSG <stds-802-3-hssg@xxxxxxxx>
> > Subject: Single ended XGMII
> > Date: Fri, 24 Mar 2000 05:10:42 -0800
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> > A few comments on using a single ended XGMII:
> > - Today we have several Quad SERDES chips in production, operating
> > at 1.25/2.5 Gbit/s with 8B or 10B interfaces. Most
> > use a 3.3V I/O swing, and I would guess about 40 ohm (nominal)
> > LVTTL/LVCMOS drivers. This effectively is a 32 bit interface.
> > I would say, these devices seem to function well for many companies.
> > - Some vendors are event moving to higher integration then
> > Quads, still using single ended interface. This further indicates
> > that noise is not a major problem.
> > - Single ended interface on the MAC side is not an issue. There
> > are many ASIC in production today with 400+ single ended I/Os,
> > and board with several tens of thousands of single ended nets.
> > - If we for XGMII use a (1.5 V swing) HSTL instead, and
> > move to a 50-55 ohm impedance controlled driver, we should be
> > able reduce the effective noise levels by close to a factor
> > of three.
> > My conclusion is that the industry keeps pushing the
> > capabilities of single ended interfaces, just because
> > differential interfaces double this pincount.
> > If we can reduce the noise by a factor of 3, and not
> > move up much in frequency, from existing proven solutions,
> > I believe we have a workable solution.
> > -Curt Berg-
D. C. Sessions