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RE: PAM-5, what are your BERs ?


I agree that your analyses are solid.  No question in my mind.

My real question is what caused the PAM-5 link to yield BER of 10^-3 or

I believe the only answer is that the complex data recovery requirements of
the multilevel coding caused the BER to go up.  Therefore, the solution is
obvious, let us revisit the data recovery circuit to improve its BER.  If
there is a document of the PAM-5 data recovery circuit, or decoder
available, I can be one of the volunteers to help to improve it.

At the data rate of 10 Gbps, the BER of 10^-3 means every second there are
10^7 bits of errors from the recovered data.  In our normal qualification
tests of BER 10^-12, only the defected parts will yield such a high BER.  I
do not feel comfortable to count on FEC to take care of the defected parts.
I will feel more comfortable, if the raw BER is near 10^-8, or 10^-9.


Edward S. Chang
NetWorth Technologies, Inc.
Plymouth Meeting, PA
Tel: (610)292-2870
Fax: (610)292-2872

-----Original Message-----
From: owner-stds-802-3-hssg@xxxxxxxx
[mailto:owner-stds-802-3-hssg@xxxxxxxx]On Behalf Of Jaime Kardontchik
Sent: Wednesday, March 01, 2000 4:58 PM
To: stds-802-3-hssg@xxxxxxxx
Subject: Re: PAM-5, what are your BERs ?

Edward Chang wrote:

> Jaime:
> I did not realize that your proposal using FEC error correction.
> .....
> How about the component and system interoperability issue.  Should we
> qualify each component at BER of 10^-12 or at 10^-3 (as you mentioned in
> another e-mail)?  When multi vendor's components are mixed in a link, what
> BER we should use in test to assure their interchangeability.
> At what subsystem level, we should add FEC to qualify a link to pass BER
> 10^-12.
> .....
> Edward S. Chang


FEC is transparent to the user and testing. During testing
of ANY receiver of any proposal you count the number of
digital bits ('zeros' and 'ones' going to the MAC that are
in error and either you meet the 10^(-12)  BER or not.

By the way: My proposal  is solid enough that I included
Viterbi decoding (FEC) as an option to be decided later
whether to include it or not (see my email "PAM-5 at
1.25 Gbaud", from Feb 15 and the accompanying pdf
file that I posted then on the web site)

Either way, with or without FEC, my proposal provides
a nice and wide open optical (and electrical) eye at the
receiver end, so initial testing of the link up to the
receiver input, in order to get an additional  feeling
whether the receiver (ANY receiver) will have a
reasonable chance to get a 10^(-12) BER is also

And then, after checking the eye at the input of the
receiver, if you want to know whether the receiver itself
is good enough, you just look at the digital 'ones' and
'zeros' at the other end of the receiver and count the
number of bits in error to measure the BER.

But ...

You hit on a nice point and  potential advantage of
using FEC compared to other methods that do not:

 During testing one could save  testing time performing
a simple screening test: Disable the Viterbi decoder
and measure the  larger BER without FEC. Since
the BER without FEC will be of the order of 10^(-3)
- 10^(-4), you can run a very fast test to throw away the
non compliant receivers and save the more consuming
compliance tests to the remaining chips.that passed
this less stringent BER test    : -)


Jaime E. Kardontchik
Micro Linear
San Jose, CA 95131
email: kardontchik.jaime@xxxxxxxxxxx