RE: PAM-5, what are your BERs ?
During the course of these discussions, I've seen people use "hard to do in
CMOS" as a reason to reject a proposal.
I'm not trying to say that someone couldn't/shouldn't build a 10GbE
transceiver in CMOS; however, I am questioning the REQUIREMENT that it be
built in CMOS at standardization. I've been working on Ethernet products
for quite a long time, and every signalling technology has started off with
some non-CMOS implementation and eventually been reduced to CMOS.
At 06:22 AM 3/1/00 -0800, jmw wrote:
>JR -- my semi-biased view:
>i contend it can be built in any manufacturing technology that will
>deliver the performance required at the cost target you like. a 5-PAM
>receiver built of monolithic CMOS can do that nicely, when feature
>size is on the order of 0.18um to 0.25um, and there are more than
>a few foundry service houses that can offer that geometry scale
>(which is a critical concern for 'fabless' semiconductor houses).
>BiCMOS and GaAs both outperform CMOS at the serial line rate,
>but neither of them is as widely available nor can they compete as
>well in complex back-end signal processing functions -- equalization,
>error correction, general DSP.
>it is my impression that many new products start in one technology
>(probably for "time to market" issues) but eventually wind-up in CMOS.
>finally, there are probably many ways one can build a fast ADC but
>the more difficult challenge -- for 10Gbd x-PAM -- is in building a fast,
>and now, back to morning coffee...
>J M Wincn
>P O Box 631
>Cupertino, CA 95015-0631
>At 06:02 PM 29-02-2000 -0800, JR Rivers wrote:
>>Not to throw water on an oil fire, by why does the transceiver have to be
>>CMOS? If my memory serves me correctly, most of the SERDES devices used in
>>GE were BiCMOS or GaAs until recently.