RE: XAUI IO specs
> By your own statement below, a static Logic 1 is when Vo+ is 400 mV above
> Vcm, and Vo- is 400 mV below Vcm, then the differential voltage (Vo+) -
> (Vo-) is 800 mV (positive peak).
> By your own statement below, a static Logic 0 is when Vo+ is 400 mV below
> Vcm, and Vo- is 400 mV above Vcm, then the differential voltage is (Vo+) -
> (Vo-) is -800 mV (negative peak).
> Then peak to peak is (positive peak - negative peak) = 1600 mV, and not
> mV as you have in your response. So, I agree with Mike Dudek, Ed Grivna,
> that your statement below is confusing. I am agreeable to any way of
> defining logic levels with or without common mode, single ended or
> differential. I agree with Ed Grivna that Vcm is not necessary to define
> differential signal, and I am only responding to a thread that is using
I recently had exactly this entire argument with several of my colleauges at
Nexabit Networks. Of course, we did not settle it, since the debate hinges
upon the definition of the term "differential voltage swing", and semantic
arguments can never be resolved.
However, permit me to make one point about signal levels and swings before I
go back to lurking: From the standpoint of the receiver of the differential
signal, the important quantity is the voltage difference between the Vin+
and Vin- inputs. The input stage of the receiver is almost always a diff
amp, and it is the difference | (Vin+) - (Vin-) | = 800 mV which appears
across the bases of the two input transistors. When a logic 1 is
transmitted, then the diff amp sees (Vin+) - (Vin-) = +800 mV between the
transistors' bases. When logic 0 is transmitted, the diff amp sees (Vin+) -
(Vin-) = -800 mV. As others have pointed out, the voltage difference
between these two logic states is 1600 mV.
But the question is: what is the important voltage to quote, 800mV or 1600
mV? As I see it, the phyiscally important voltage is 800 mV because this
is the signal amplitude which much defeat any physical imperfections at the
receiver input diff amp, e.g. input offset voltage, noise, etc. The 1600 mV
difference between logic 1 and logic 0 is a meaningless number since the
diff amp never sees any physical voltage of 1600 mV.
The situation is different in single-ended logic, where the voltage
difference between logic 1 and logic 0 is actually seen by the input
amplifier; it is this voltage difference (e.g. 5V in old-fashoined TTL)
which must defeat the input amp imperfections.
> Given all this confusion, it may be prudent to include pictures of logic
> signals, and define the swings in an already standardized way.
Agreed. The best thing to do is draw a picture.
Nexabit Networks/Lucent Technologies