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Re: 20 ppm clock tolerance for WIS


I appologize for the delay in responding to your question.  I wanted to
be absolutely sure of the facts before I replied.

I have sent out 5 requests for quotes for oscillators, and thus far I
have received three responses.

The first two responses indicated a less than 10% price premium for a
20 ppm 155.52 MHz oscillator versus a 100 ppm oscillator with otherwise
identical specs.  I can't talk about absolute price on this reflector,
but I can say that the price difference is very small.  Truly, it is
lost in the noise as far as the overall cost for a 10 Gigabit interface
is concerned.

The third quote I received indicated a more substantial cost
difference.  The 20 ppm oscillator cost twice as much as the 100 ppm.
However, the lead time for the 100 ppm oscillator was 20 weeks, whereas
the 20 ppm oscillator is available immediately.  Once again, the
absolute price difference is a very small percentage of the overall
cost for a 10 Gigabit adapter.

My conclusion remains the same.  Specifying 20 ppm is the right way to
go.  The cost difference does not justify changing to 100 ppm, because
this change probably will compromise compatibility with existing OC-192
transponders and regenerators.

As to the jitter specifications, it is my understanding that the WAN
PHY proponents want to use all of the same optical components that are
being specified for the LAN applications of 10 Gigabit Ethernet.  I
believe that the SONET jitter specifications do impose additional cost
on the optical components.  It is unreasonable to burden the LAN
applications with the cost of meeting the SONET jitter specifications.
Therefore, while I am keeping an open mind on the topic, and I am
willing to consider other points of view, I believe that we should not
impose the SONET jitter specifications on the 802.3ae PMDs, and I don't
think that this will compromise compatibility with OC-192 transponders
and regenerators.

If I get any additional responses to my requests for quotes, I will
be happy to share them on the reflector.

Howard Frazier
Cisco Systems, Inc.

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From praveen@xxxxxxxxxxx Tue May 30 15:38:01 2000
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Date: Tue, 30 May 2000 15:56:05 -0700
To: gnicholl@xxxxxxxxx, hfrazier@xxxxxxxxx, stds-802-3-hssg@xxxxxxxx
From: Praveen Kumar <praveen@xxxxxxxxxxx>
Subject: 20 ppm clock tolerance for WIS
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Gary, Howard:
	For the benefit of those who could not make it to your presentation in 
Ottawa,  could you clarify some of the issues that you raise.

You mention that the "cost difference between +/-20ppm and +/-100ppm 
oscillators is a tiny fraction of the total cost of a 10GigE  interface".
Could you perhaps substantiate this statement with quantitative input (some 
real numbers).  My understanding is that the +-100ppm tolerance was 
specified only to keep the cost down (as the cost differential between a 
20ppm solution and 100ppm solution is perceived to be significant).

You recommend using "LAN PHY jitter specs".  This makes the WIS 
incompatible with installed base SONET . This doesn't seem to meet your 
goal of being compatible with installed OC-192 SONET 
infrastructure.  Please clarify.


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