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Re: Gearbox reality check


It doesn't really matter whether the frame size dependent buffering requirement
belongs to the PCS or WIS sublayer. It certainly does not belong in the MAC
since the 10 GbE MAC and RS and XGMII (if present) will run at 10.00000 Gbps. My
point is that this additional buffering requirement is relevant only to the WAN
PHY and not the LAN PHY. Since the buffer size is frame size dependent, most
implementers will opt for supporting the maximum reasonable frame size. This
translates to ~2K more buffering for the WAN PHY re: the LAN PHY and is in
addition to the the buffering requirement for SONET framing et. al.

Implementation reality would place the frame size dependent buffering in the WIS
which is where SONET framing is performed. This is where the "rubber meets the
road" as far as rate control is concerned. The MAC simply throttles the data
rate over time by increasing the IPG dynamically. It's up to the PHY to buffer
the frame since once it starts it's coming at you at a 10 Gbps rate, and the WIS
can only insert 9.29 Gbps into the WIS frame. 

I fully agree that the WIS is a small price to pay to run 10 GbE over the
existing SONET/SDH based WAN infrastructure. What I don't agree with is that
this price is a negligible penalty for the much higher volume 10 GbE LAN links
to pay. As I have pointed out in other presentations and reflector notes, the
location of the WIS is implementation dependent since it is a PHY sublayer. The
same exact compatibility with the existing SONET/SDH based WAN infrastructure
can be provided via a 10 GbE LAN PHY with a WIS at the SONET end.

Best Regards,

> Tim Armstrong wrote:
> Rich,
> Thanks for your clarification. It made me realize I needed to provide more
> clarity myself.
> My budget was really for the buffering requirements in the WIS functional
> block as shown in slide 3 of:
> The rate adaptation between 10.000 Gb/s XGMII data rate and the ~ 9.29
> Gb/s WAN PHY rate that you refer to will require buffering in either the PCS
> or in the MAC layer. See slides 38, 40-41 of the presentation referenced
> above. If it is in the MAC layer, it will likely be common to LAN and WAN
> PHYs. Similarly, if it ends up in the PCS and vendors choose to implement
> a common PCS for LAN and WAN, then it will be common to both.
> For standard Ethernet maximum-length frames, the MAC/PCS rate
> adaptation will require < 110 octets. (If you were to add this to the WIS
> buffer, the total would be ~ 1k octets per direction).
> If vendors choose to support LTL frames then, as you point out, ~ 630 octets
> will be required for the MAC/PCS rate adaptation.
> Some more detail on my WIS buffer budget:
> The WIS payload capacity is 9.584640 Gb/s. The 576 + 64 octet portion of
> my budget absorbs the difference between that payload rate and the nominal
> 9.95328 Gb/s WAN PHY line rate. The 192 octets for pointer adjustments
> handles any offset from nominal rates when crossing any WIS/PCS clock
> boundaries. The sum, after including a few octets for jitter tolerance and a
> reasonable read/write pointer separation, will come in below 1k octets per
> direction.
> I hope we can agree that the cost of this buffering (and the other WAN PHY
> functions) is trivial and represents a very small price to pay in order for
> Ethernet to gain easy access to the existing SONET/SDH-based WAN
> infrastructure.
> Tim Armstrong
>      -----Original Message-----
>      From:   Rich Taborek [SMTP:rtaborek@xxxxxxxxxxxxx]
>      Sent:   Tuesday, June 27, 2000 10:59 PM
>      To:     HSSG
>      Subject:        Re: Gearbox reality check
>      Tim,
>      I didn't want to use the "J" word in my previous note on this issue, so
>      instead I'll refer to "larger-than-life" frames. Note that based on the
>      size of these LTL frames, there is an additional buffering requirement
>      for the WAN PHY of >7% of the frame size due to the speed difference
>      between the 10 Gbps PHY data rate and the 9.29 WAN PHY data rate.
>      For a 9 KB LTL frame, the buffering requirement would be an additional
>      630 bytes per data direction over and above the numbers you stated in
>      (1) below.
>      Note that additional buffering specific to LTL frames is not applicable
>      to a LAN PHY regardless of frame size.
>      I believe that once all the buffering requirements are listed and
>      applicable macros are identified that the actual WAN PHY buffering
>      requirements to provide the equivalent frame transport as the LAN PHY
>      will be in the 5 KB to 10 KB range.
>      I'm sure I'll get blasted for this blasphemous response, but what the
>      heck :-)
>      Best Regards,
>      Rich

Richard Taborek Sr.                 Phone: 408-845-6102       
Chief Technology Officer             Cell: 408-832-3957
nSerial Corporation                   Fax: 408-845-6114
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