Re: (Additional) Clause 51 Question
To answer your question simply ... one can actually use the "falling" edge
to sample. Because the clock lines are differential, one can just invert or
cross connect the two clock lines.
In a message dated 12/13/00 8:58:37 AM Pacific Standard Time,
I have a question about "PCS output timing" vs. "PMA
Input timing": The tx_data-group is driven with the
rising edge of the clock. Why cant the PMA sample it
with the falling edge? The timing means that the clock
and data must be rout with a different delay on the
board in order to stand the specifications?
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