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*To*: HSSG <stds-802-3-hssg@xxxxxxxx>, stds-802-3-hssg-serialpmd@xxxxxxxx*Subject*: Re: XAUI jitter test pattern proposal*From*: "Tom Lindsay" <Tom.Lindsay@xxxxxxxxx>*Date*: Thu, 01 Feb 2001 10:25:48 -0800*Organization*: Vixel Corp.*References*: <3A77AF80.E15C45D5@xxxxxxxxx>*Reply-To*: Tom.Lindsay@xxxxxxxxx*Sender*: owner-stds-802-3-hssg@xxxxxxxx

Rich Taborek pointed out a mistake in the proposed pattern.

See below, where I spell out the detailed pattern. Everything was previously correct, except that I showed the wrong hex byte. I had shown EB for one of the D20.7s, when it should have been F4 - the Dcode, binary sequences, disparities, etc. were okay.

This mistake shows up twice below, once per each repetition of the 188 byte run. I had a mistake in a spreadsheet cell equation.

Tom

Vixel

425/806-4074

Tom Lindsay wrote:

I accepted an action to create a (jitter) test pattern for XAUI. My proposal is below. If I have posted to a wrong reflector, I apologize, and let me know.This is the payload portion only, given for each of the 4 lanes. That is, this pattern still must be built into an aggregate payload, where the contents of the 4 lanes are combined. I have not done that. The length of this pattern is a total of 376 bytes, such that for 4 lanes combined, the total payload is 1504 bytes (I was told that 1518 was a maximum, but for other reasons, the pattern length should be divisible by 16).

The pattern interposes the 2 character sequence Mysticom used in their "killer" jitter pattern between the two sequence components that form the core of CJTPAT from Fibre Channel. The durations of the CJTPAT components are reduced to fit into the payload. PLL settling may be somewhat sacrificed, but I believe the durations are still sufficient to stress typical parts. The relative durations still assume that PLL response time is inversely proportional to input pattern transition density. This may want to be challenged. (Approximately) 8 bytes of the killer pattern appear in each instance.

Each 376 byte sequence actually is 2 times through a 188 byte sequence, such that both disparities are tested.

Here is the 188 byte sequence:

D30.3 132 timesD20.7/D11.7 pair 3 timesD20.7/D11.5 pair 1 timeD21.5 40 timesD20.7/D11.7 pair 4 timesRepeat above, but now with alternate disparityHere is the 376 byte sequence showing the D character, hex code, starting running disparity, serial sequence, and ending running disparity. Note that if the initial running disparity is + (- is shown), then the 2 188 byte sections of the pattern will be effectively swapped. As shown below, with + starting disaprity, the first half of the pattern provides the more stressful serial sequences of the "killer" pattern.

StartD30.3 7E - 0111100011 +... (cont'd) ...D30.3 7E + 1000011100 -D20.7 F4 - 0010110111 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 + Was previously EB hex, corrected to F4.D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +D11.5 AB + 1101001010 +D21.5 B5 + 1010101010 +... (cont'd) ...D21.5 B5 + 1010101010 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +D11.7 EB + 1101001000 -D20.7 F4 - 0010110111 +Repeat above, but now with alternate disparityD30.3 7E + 1000011100 -... (cont'd) ...D30.3 7E - 0111100011 +D20.7 F4 + 0010110001 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 - Was previously EB hex, corrected to F4.D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -D11.5 AB - 1101001010 -D21.5 B5 - 1010101010 -... (cont'd) ...D21.5 B5 - 1010101010 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -D11.7 EB - 1101001110 +D20.7 F4 + 0010110001 -EndComments?

Thanks,

Tom Lindsay

Vixel

425/806-4074

**References**:**XAUI jitter test pattern proposal***From:*Tom Lindsay

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