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I attended the last meeting in Irvine when this subject was discussed and I understand the reasoning behind it.
I used this forum to have more visibility on a subject that can cause grievance to system manufacturers today. Furthermore, I agree with some of the feedback so far, that the bus should be at least 1.8V resilient.
From: Edward Turner [mailto:Edward_Turner@xxxxxxxxxxxx]
Sent: Wednesday, February 28, 2001 2:01 AM
Subject: Re: Clause 45: MDIO Electrical Specifications
The important thing to bear in mind when reviewing the MDIO electrical interface
is that we are probably going to be using it for the next ten years or so. This
was the main consideration during our discussions in the ad-hoc up to the
January meeting, and at the meeting itself.
Even in today's technologies a 3v3 tolerance for a 1v5 signal could strain the
input protection diode clamps. As we move to smaller processes and voltages,
3v3 tolerance would become even more of a burden for the IC vendors to support.
With that in mind, people have suggested that we actually adopt an even lower
voltage for the interface. The selected voltage was seen as a fair compromise
between today's processes and tomorrow's.
One of the comments I received on D2.1 was on the electical interface so this
issue will be up for discussion at the next meeting
On another point, the selection of the MDIO electrical interface should be
regarded as orthogonal to the selection of the XGMII electrical interface. If
the MDIO uses the same voltages as the XGMII then we are lucky, but the MDIO
will be around a lot longer than the XGMII so we should not let the XGMII
electrical specification influence the MDIO electrical specification.
Clause 45 editor.
"Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx> on 27/02/2001 18:20:59
Sent by: "Rabinovich, Rick" <rick.rabinovich@xxxxxxxxxxxxxx>
cc: (Edward Turner/GB/3Com)
Subject: Clause 45: MDIO Electrical Specifications
Table 45-41 indicates a maximum VIH = 1.5V. Why is it so restrictive?
I suggest that the inputs should be resilient to LVTTL levels (3.3V
Nominal), otherwise system manufacturers will be forced to provide
additional voltages and logic to support a 2-wire management bus.
Hardware Group Lead Engineer
26750 Agoura Road
Calabasas, CA 91302
Fax : 818-880-9293