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RE: XAUI SJ jitter test


I can comment that for the system we have in our lab there is a 10MHz FM
modulation bandwidth for the clock source and a 20Mhz limit for the
modulation source. I am not aware of what the limit is for the Pattern
generator itself.



Boaz Shahar <boazs@xxxxxxxxxxxx> on 03/13/2001 10:22:10 AM

Sent by:  owner-stds-802-3-hssg@xxxxxxxx

To:   "'Rogers, Shawn'" <s-rogers@xxxxxx>, "'Tom Lindsay'"
cc:   HSSG <stds-802-3-hssg@xxxxxxxx>
Subject:  RE: XAUI SJ jitter test

The  BERT is the problem or it is the Pattern Generator/Signal  Generator?

-----Original Message-----
From: Rogers, Shawn  [mailto:s-rogers@xxxxxx]
Sent: Tuesday, March 06, 2001 6:32  PM
To: 'Tom Lindsay'
Subject: XAUI SJ  jitter test

Tom,  I'm asking you this as I seem to recall from the Jan Interim you
presented on  the Annex 48A jitter test approach. If I am in error please
forgive me.

In  D2.1, Clause 47, Page 285, Figure 47-8 shows Sinusoidal Jitter
Tolerance Mask  that requires 0.1UI SJ tolerance up to 20Mhz.  Can you or
anyone on the  reflector describe how this limit can be tested.  I am told
that the HP  3G and 12G BERTs can only modulate up to 10Mhz.

Shawn Rogers