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RE: Clause49 Clock Tolerance adjustment


It is covered in for idle deletion and insertion and in
for sequence ordered set deletion. 


-----Original Message-----
From: Justin Gaither [mailto:jgaither@xxxxxxxxxxxxxxx]
Sent: Monday, April 02, 2001 11:01 AM
To: 802.3ae
Subject: Clause49 Clock Tolerance adjustment

	Let say I have a system with a 10GBase-R PCS using XGMII to drive a
RS/MAC.  Where is the +/-100ppm clock tolerance adjustment handled?  In
Clause 48 it is discussed in context of removing the ||R|| columns. 
However I dont see any mention of it in Clause 49.  


Justin Gaither                       Phone: 512-306-7292  x529
RocketChips a Division of Xilinx     Fax:   512-306-7293
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