RE: MDIO addressing
Based on the fact that DTE-XS contains both 8B/10B PCS and PMA: A 10GBASE-X
system which is constract with: PMD, DTE-XGXS (Instead of 8B/10B PCS and
PMA), and a MAC considered as a "Compliant System"? Note that in such a
system the Device address of the XGXS is 5, and DEVADD=1 and =3 are not
> -----Original Message-----
> From: Edward Turner [mailto:ed_j_turner@xxxxxxxxxxx]
> Sent: Wednesday, April 04, 2001 10:06 PM
> To: stds-802-3-hssg@xxxxxxxx
> Subject: Re: MDIO addressing
> You access the DTE-XS registers (including any of its
> 'PCS' control registers) by sending MDIO frames with a
> DEVAD = 5 onto the MDIO bus, similarly the PHY-XS is
> accessed by sending frames with a DEVAD = 4 and the
> 10GBASE-R PCS or 10GBASE-X PCS is accessed by sending
> frames with a DEVAD = 3. This allows individual and
> separate configuration of each of the devices.
> The PCS device (3) in table 45-1 refers to the PCS
> device within the PHY area of figure 46-1 (the box
> just above PMA). It comprises the 10GBASE-R PCS or the
> 10GBASE-X PCS - depending on your port type.
> --- "Stefan M. Wurster" <stefan@xxxxxxxx> wrote: >
> > When using a configuration as in figure 46-1, how
> > does one address the
> > individual PCSs (the PCS of the DTE-XS, the PCS of
> > the PHY-XS and the PCS of
> > the "PHY" device going to the optics).
> > Given that each PCS could be configured in a
> > different fashion in each
> > device, how is this handled within the Management
> > Interface?
> > Also, what does the PCS device #3 in Table 45-1
> > refer to?
> > Which of the PCSs (referring to figure 46-1) does it
> > comprise?
> > Stefan Wurster
> > Dir. Engineering
> > TDK Semiconductor
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