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Clarification wanted: Draft 3.0 Figure 46-9 Link Fault Signaling State Machine


by inspecting Figure 46-9 in draft D3.0 on page 256 we see the following
implementation problems.

The States "COUNT" and "FAULT" reset the counter col_cnt to zero.
But col_cnt is never incremented in any state, so the exit of these states
based on col_cnt > 127 will never be reached.

Is there some implicit meanins we just missed, or is the diagram not correct ?

Another question: Is there a Jitter Spec on the XGMII TX/RX clocks ?



Daniel Koehler, dkoehler@xxxxxxxxxxxxxx
MorethanIP GmbH