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RE: [802.3ae] XAUI Rj TR comment

In the block diagram on page 11, The "recovered data" and "recovered clock"
that goes from the DUT to the BERT are the digital I/F (i.e. ~80 signals
with 156Mhz) or a XAUI bus with reference clock?

> -----Original Message-----
> From: Howard A. Baumer [mailto:hbaumer@xxxxxxxxxxxx]
> Sent: Monday, July 30, 2001 9:22 PM
> To: HSSG_reflector (E-mail)
> Subject: [802.3ae] XAUI Rj TR comment
> To all concerned,
>      I put in a TR Comment against D3.1 stating the desire to put a
> maximum
> limit on the TX Rj.  This comment was rejected and left unresolved.
> There was fairly wide agreement that having a max limit on TX 
> Rj should
> be done but that we should first get a broader input on what 
> this limit
> should be.  I took on the action item to start a reflector 
> discussion to
> determine this limit.
>      The current draft sets a limit for Tj and a limit for Dj and then
> defines Rj aa Rj = Tj(max) - Dj(actual).  The TR comment 
> proposes that a
> limit be set for Tj, Rj and Dj and that Rj(actual) + Dj(actual) <
> Tj(max). There is a presentation that we are developing that
> attempts to figure out a limit for Rj.  It can be found at
> Please review and comment.
>      This presentation also brings out a problem with the 
> current Jitter
> Tolerance test technique.
> Howard Baumer