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Re: [802.3ae] Clause 49 PCS Jitter Test Question


Since this value is used directly as input to the scrambler,
it is referring to the PCS code payload that has 0x55 for the
Block Field Type, 0x0 for both O0 and O4, 0x00 for D1, D2,
D5 and D6 and 0x01 for D3 and D7



This along with a sync value of 10. See the 5th Control
Block Format in Table 49-7.

This is probably not specified as completely as possible
though it should be understood. Perhaps a comment against
the upcoming D3.2 might be worthwhile.


Tuan Hoang wrote:
> For LF order_set pattern option specified in section 49.2.8 for PCS Jitter
> test data pattern; between XGMII code and 10GbaseR code, which one should be
> used for LF order_set patterns that are driven into the PCS scrambler during
> PCS Jitter test?
> Thanks,
> Tuan Hoang
> ****************************************
> Tuan Hoang
> Optical Transport Unit
> 49 Discovery
> Irvine, CA 92618
> Phone: (949) 585-6888
> email: tuanh@xxxxxxxxxxxx
> ****************************************

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