RE:(2) [802.3ae] WIS Test Pattern Error Counts
Tom,
Just to be absolutely sure:
Does that mean that the sentence in 50.3.8
(requiring a test pattern checker
to synchronize and report bit errors)
will be removed from the spec?
Bruce
> -----Original Message-----
> From: Tom Alexander [mailto:Tom_Alexander@xxxxxxxxxxxxxx]
> Sent: Monday, September 17, 2001 11:42 AM
> To: Nepple, Bruce; stds-802-3-hssg@xxxxxxxx
> Subject: RE: [802.3ae] WIS Test Pattern Error Counts
>
>
> Bruce,
>
> Your interpretation of D3.2 is correct. As per the resolution to
> Comment #53 against D3.1, the existing bit error mechanisms are to
> be used to detect and report pattern bit errors, as specifically
> stated in the comment resolution:
>
> "...The method of measuring bit errors shall be to use the
> current B1, B2 and B3 SONET parity checking mechanisms in
> the WIS Receive process. No additional logic shall be added
> to the error checker for counting errors."
>
> There is no Path Bit Error mechanism or counter in the normal WIS
> processing, and therefore there is no Path Bit Error counter for
> test pattern mode, either in Clause 50 or Clause 45.
>
> There was an extensive discussion on this subject during the
> comment resolution meeting. The general consensus was that the
> existing B1/B2/B3 parity checks provided sufficient capability
> for detecting test pattern bit errors, and also for providing
> a rough assessment of the bit error rate. The view was that there
> was no good reason to increase the WIS complexity by providing
> additional hardware to measure the bit error rate more precisely.
>
> I hope this answers your question.
>
> Best regards,
>
> - Tom Alexander
> WIS Scribe
>
>
> -----Original Message-----
> From: Nepple, Bruce [mailto:bnepple@xxxxxxxxxxxxxxxxxxx]
> Sent: Friday, September 14, 2001 7:26 PM
> To: stds-802-3-hssg@xxxxxxxx
> Subject: [802.3ae] WIS Test Pattern Error Counts
>
>
>
> In 50.3.8 of D3.2 it is indicated that the WIS test pattern checker
> shall have the ability to synchronize to the mixed frequency
> test pattern and report bit errors detected within the payload
> to the Station Management entity. It then goes on to describe
> the Section BIP, Line BIP, and Path Block error counters, but
> makes no mention of a Path Bit Error Counter. Did I miss
> something? The three counters mentioned above will function
> without a bit checker through the standard parity bytes.
> I didn't see such a counter in 45.2.2 either.
>
> Thanks
>
> Bruce
>