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RE: [802.3ae] MIME-Version: 1.0

Hi Amely,

The STA is the driver of all operations on MDIO interface. So a CPU which
wants to access a PHY register will do a read/write to STA (probably part of
MAC) which in turn will do the read write to PHY using MDIO interaface and
return the value to CPU. Since the CPU should not be engaged for such a long
time, you may have to have some status bit/ interrupt etc. to inform when
read is over.

Devendra Tripathi
CoVisible Solutions, Inc
90 Great Oaks Blvd #206
San Jose, Ca 95119
Tel: (408)226-6800,
Fax: (408)226-6862

-----Original Message-----
From: owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx
[mailto:owner-stds-802-3-hssg@xxxxxxxxxxxxxxxxxx]On Behalf Of engeleye
Sent: Thursday, April 25, 2002 2:05 AM
To: stds-802-3-hssg@xxxxxxxx
Subject: [802.3ae] MIME-Version: 1.0

    I  know  that  mdio  is  the  management interface  between the STA and
PHY,but where the write and read command come from? And, if  they  is
determined by some registers,then what the registers is and where they are?


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