RE: [802.3ae] XAUI jitter tolerance test
I'll try this.
1. The purpose of the statement was to help ensure that someone would
not create RJ with mostly low frequency content that would be tracked
out by the tested CDR. So, in that sense, the spec is intending to allow
high frequency RJ and to ensure that a CDR can appropriately dissipate
In reality, RJ will probably not have a lot of high frequency content,
and in fact may have frequency content dominated below a few MHz.
Sources include clock synthesis, multipliers, etc. The spec assumed that
if a CDR can tolerate high frequency RJ, it can also tolerate low
2. I am still putting some thought into this, but I believe it is too
simple to say that deterministic jitter is mostly high frequency. I
agree that common mechanisms that create DJ may be high frequency (such
as high frequency rolloff in the channel, DCD, etc.), but the jitter
spectrum generally tracks the spectrum of the data itself. Indeed, CJPAT
creates significant low frequency jitter when passed through a lossy
Also, mechanisms such as inadequate low frequency response also map into
low frequency DJ. But again, the jitter spectrum will tend to match that
of the data.
(Of course, a benefit of 8B10B is that its spectral content rolls off at
the low end when compared to scrambled codes).
So, in real systems, you will have to tolerate other jitter sources -
both RJ and DJ.
(425) 672-8035 x105
From: Qicheng Yu [mailto:qiyu@xxxxxxxxxx]
Sent: Friday, May 17, 2002 5:05 AM
Subject: [802.3ae] XAUI jitter tolerance test
I have a question on the jitter tolerance test signal for XAUI receiver.
In P802.3ae/D4.3, section 184.108.40.206 Jitter Tolerance, on page 305, it is
said "Random jitter is calibrated using a high pass filter with a low
frequency corner of 20MHz and 20dB/decade roll off below this." Does
this mean the random jitter component of the jitter tolerance test
signal is mostly high frequency, above 20MHz? If so, since deterministic
jitter is also by nature high frequency, the amount of jitter a receiver
has to tolerate at, say, 2MHz, would be mostly the 0.1UIpp sinusoidal
jitter and not much more. Is this correct? Thanks for your attention.