HARI proposal at 1.25 Gbaud/sec
Rich Taborek wrote:
> Patrick,
>
> IEEE P802.3ae is an open forum. I have, jointly with many proponents, proposed
> and support Hari an optional interface for LAN PHY PMDs. Please feel free to
> submit your ideas as a counter-proposal to Hari. Your next opportunity will be
> in Dallas in January.
>
Why wait for Dallas ... ?
Hello Rich, Patrick and 10 GbE'ers;
I enclose a short pdf file containing a detailed description of
a CMOS implementation of the HARI transceiver running
at 1.25 Gbaud/sec on the backplane. This architecture is
similar to the one I described in Kauai as a solution for the
installed base of MMF (see my presentation "300 meters on
installed MMF").
In fact, since it is a PHY running on the Copper backplane
instead of fiber, the HARI solution I propose does not need
any lasers, optical muxes, photodiodes and transimpedance
amplifiers.
For those cases were the optical transceiver cannot be put
in close proximity to the electrical transceiver and the need
to transport 10 Gbps over long traces of Copper arises,
it makes a lot of sense to keep the baud rate as low as
possible and, at the same time, minimize the number of
traces on the board and backplane.
A PAM-5 solution uses only 4 traces, as the original
proponents of HARI suggested, and it runs at 1.25 Gbaud/s
on these traces, instead of 3.125 Gbaud/sec. Therefore,
it is the right solution to the main problem: the limited
bandwidth of boards and backplanes.
8b/10b is simpler than Viterbi decoding, but the cost
is not in the CMOS transceiver that will be pin limited
in both cases. Running at 1.25 Gbaud/sec on the board
allows the use of long traces, common layout practices
and board materials (FR-4) and higher yield. In other
words, running at 1.25 Gbaud/sec is much cheaper and
safe.
Happy Holidays and New Year to all and see you next year !
Jaime
Jaime E. Kardontchik
Micro Linear
San Jose, CA 95131
email: kardontchik.jaime@ulinear.com
hari.pdf