Re: 16-bit 625Mbaud XGMII
Jaimie,
I agree with Andy. We've done ASIC designs with the 622MHz OIF interface
and timing is rather tough. The 312M is much easier.
Andreas Bechtolsheim <avb@cisco.com>@ieee.org on 03/20/2000 04:07:09 PM
Sent by: owner-stds-802-3-hssg@ieee.org
To: stds-802-3-hssg@ieee.org, kardontchik.jaime@ulinear.com
cc:
Subject: Re: 16-bit 625Mbaud XGMII
Jaimie: you need to count package pins, not signal I/Os.
Your 625 MHz XGMII using LVDS differential signalling
requires 76 pins, which is the same pincost as the
312.5 MHz XGMII using single-ended drivers.
In addition, you would need to run at least part of
your logic at the 625 MHz which is significantly
more difficult to implement than staying with a
clock frequency of 312.5 MHz.