Re: XGMII electricals
I totally agree with you Yong. The straw poll in New Orleans was to indicate
preferences.
I understand the benefits of moving to HSTL. Faster, wider window to sample
the data, less power consumption (major issue when utilizing 74 pins),
reducing noise and more. BUT, going half the way trying to specify new
version of HSTL will not benefit the technology.
From board design perspective, FPGAs or ASICs designs interfacing 10Gig
application to legacy systems will suffer huge delay. Silicon vendors
libraries will be ready, qualified & tested some month after specifying the
standard. XGMII as a short term solution should be implemented shortly
otherwise it will be skipped.
Many companies already have designs that are waiting for the I/O issue to be
close.
Currently most of the silicon vendors already have HSTL I/O and they offer
three classes of HSTL - I, III, IV where class I is more popular.
I support avoiding any new HSTL specification. I suggest moving to HSTL
should be only to one of the EIA/JESD8-6 specified options .
Dori Itzhaki
mailto:dorii@mysticom.com