RE: Minimum IPG w/ WIS ?
Julio,
The number in the note on page 41 is the minimum for all 10 Gb/s
implementations in that no compliant 10 Gb/s implementation will deliver a
shorter IPG than that. The WIS implementations will just have more margin to
the minimum.
My other responses are imbedded bracketed by my initials <PAT>.
Pat
-----Original Message-----
From: Julio.Hernandez@ti.com [mailto:Julio.Hernandez@ti.com]
Sent: Wednesday, February 21, 2001 9:45 AM
To: THALER,PAT (A-Roseville,ex1); stds-802-3-hssg@ieee.org
Subject: RE: Minimum IPG w/ WIS ?
Pat,
Thank you for the feedback and clarification. It helps a lot.
With Respect To:
Pat > First off, the minimum IPG does not occur in the WIS case.
True, I guess I read too much into the note on page 41, lines 42-45.
Thinking it was for all "10Gb/s implementations." Sorry !
WRT:
Pat > ...
Pat > So IFS stretch isn't particularly relevant to your question.
If what you mean here is that we are focusing on minimum IPG, and
stretching results in something other than the minimum, than I agree.
Otherwise, I do not understand your comment ?
Perhaps, I should have elaborated further to explain that
the goal was actually to understand the bounds of IPG in the
different possible implementations, rather than just the minimum.
<PAT> What I meant is that IPG stretch isn't relevant to the calculation of
the minimum IPG seen by a receiving MAC. Out of the receiving WIS/PCS, the
minimum IPG would be 5 octets (the minimum IPG going into the WIS) plus 6
bytes or more restored when moving the speed back up to 10 Gb/s. I guess a
really really strange implementation could follow the receiving WIS with
XGXS sublayers that needed to delete idles and therefore could reduce it
back to the minimum but it would be highly unusual. <PAT>
WRT:
Pat > ... However, I will point out that I do not get same
Pat > results as you for IPG sizes with WIS.
Pat > ...
Two things:
1. Your right. I mixed bits for bytes when dividing.
Thanks for catching this. (-:
2. I was referring to total IPG, no just the added stretch bytes.
Since, it seems the minimum IPG is maintained and the stretch
bytes are added on top of that.
So, the bytes to bits correction for the divider in my calculations
would correct the previous total IPG numbers for WIS implementations
to:
1. 18-19 total minimum IPG bytes/octets (+/- 3 for the RS layer
function you mentioned) for min size frames, and
2. 130-131 total minimum IPG bytes/octets (+/- 3 for the RS layer
function you mentioned) for max size frames
Is this correct from a total IPG perspective ?
<PAT> Yes, my calculation was just bytes added by the stretch. For the
total, one adds 12 +/- 3. <PAT>
WRT:
Pat > ... That might be just as that 9 character IPG arrives and
Pat > it will delete 4 characters from it leaving a 5 character IPG.
Pat > ...
and
Pat > ... So there can be up to 6 sublayers doing clock
Pat > compensation in a path.
Pat > ...
This is system level piece I was unclear about, whether it was 3 or 6.
Thanks for the clarification. So, I see how in some bizarre (but
highly unlikely) situation their could be a need or desire to remove
up to 6 4-byte columns (24 total bytes) from the IPG of a single
pair of frames between the sending MAC and the receiving MAC, and
this would not be possible within one IPG for certain frame sizes
less than the max frame size. Say those under 344 bytes in frame size ?
Thanks again for the clarification. (-:
<PAT> In the non-WIS case, frame size doesn't matter. Depending on how far
from the transmitting MAC a sublayer is in the stack, it may have to wait
one or more frames for a chance to delete. Over a relatively short term
average, there will be at least two deletable columns per IPG. And since a
max frame accumulates less than 3 bits in the worst case clock skew while
FIFOing will tend to be in 4 or more byte increments, it shouldn't be a
problem to wait a few IPGs for the chance to delete. <PAT>
Thanks,
Julio
From: pat_thaler@agilent.com on 02/20/2001 05:39:11 PM
To: Julio Hernandez/SSI1@SSI1, "THALER,PAT (A-Roseville,ex1)"
<pat_thaler@agilent.com>, stds-802-3-hssg@ieee.org
cc:
Subject: RE: Minimum IPG w/ WIS ?
Julio,
First off, the minimum IPG does not occur in the WIS case. IPGs at the
receiving RS will tend to be much longer than the minimum because the
receiving PCS will put the data rate back up to 10 Gb/s reinserting the
bytes that the transmitting PCS stripped out (plus or minus a little
because
of clock compensation).
So IFS stretch isn't particularly relevant to your question. However, I
will
point out that I do not get same results as you for IPG sizes with WIS.
The calculation for IFS stretch is:
ifsStretchSize := (ifsStretchCount + headerSize + frameSize +
interFrameSpacing) div ifsStretchRatio
which is for a min frame the integer part of (64 + 512 + 96 plus 0 to
104 in
ifsStretchCount) divided by 104 which means IFS stretch for a min size
frame
is 6 to 7
For a max frame, 512 becomes 1522 * 8 for a stretch of 118 to 119
octets.
These are the IPG sizes going into the RS. Coming out of the RS some
IPGs
may be shrunk or enlarged by up to 3 octets to align the Start to lane
0.
These numbers shouldn't be surprising because the payload capacity of
WIS is
about 8% less than 10 Gb/s.
So, what does cause the minimum IPG. When attached to a LAN Phy, the MAC
puts out a minimum IPG of 96 BT = 12 octet times.
The RS may delay the start of a packet up to 3 octet times to align it
to
lane 0 and it may not need to delay the start of the next packet at all.
Therefore, the RS can shrink any individual IPG by up to 3 characters.
Note
that this doesn't change the average of IPG lengths. Those 3 characters
will
eventually show up added to IPGs when the RS again delays the start of
packets. It is a jitter in packet start rather than a loss of overall
idle
time. Never the less,
minimum IPG out of an RS is 9 characters.
If a sublayer doing clock compensation has just reached the FIFO level
where
it wants to delete an idle column, then it will delete it when it gets a
chance. That might be just as that 9 character IPG arrives and it will
delete 4 characters from it leaving a 5 character IPG. As you point out,
it
won't need to delete again for quite a few columns. (However, you should
find that it may worst case to delete one in every 50,000 columns rather
than one in 100,000 because the incoming clock worst case is +100 PPM
and
the outgoing clock is -100 PPM for a difference of 200 PPM.)
Of course, each XGXS and each PCS in the link may be doing clock
compensation. That is unlikely, but each of these sublayers is allowed
to.
So there can be up to 6 sublayers doing clock compensation in a path. It
is
possible for each of them to be running slightly slower than the one
before
it. Then on a very improbable moment, all their FIFOs could reach the
point
where they want to delete idle at the same time. If packets are being
sent
with minimum IPG, they won't all get to delete in the first IPG. They
will
shorten IPGs to the minimum until each of them has had a chance to
delete a
column. Over times, all of the deletions will average to one out of
every
50,000 columns or less, but in the worst case, 6 of those deletions
could be
clumped close together.
I hope this clarifies the process for you.
Regards,
Pat
-----Original Message-----
From: Julio.Hernandez@ti.com [mailto:Julio.Hernandez@ti.com]
Sent: Tuesday, February 20, 2001 4:25 PM
To: pat_thaler@agilent.com; stds-802-3-hssg@ieee.org
Subject: RE: Minimum IPG w/ WIS ?
Pat,
I have been tracking this IPG thread, because I too am trying
to understand what is intended for minimum IPG (actually IFG -
Inter Frame Gap, no ?) in the 10Gb/s WIS application, and I
would like to pose the following observation for clarification
by those who understand it better.
If I read the algorithm correctly in section 4.2.8, specifically
page 32, lines 16-22, it looks like the MAC is taking the minimum
IPG/IFG called out in the table in section 4.4.2 (page 41, lines
15-16), into account when counting bits to determine its "stretch
size" (bytes/octets that will be added in the IFG/IPG to adapt for
the WIS rate). As well as, the preamble and SFD bytes (header size).
So, if I understand it all correctly, that should mean that in a
PCS+WIS application, the MAC generated data stream into the XGMII
inputs of the PCS will contain:
1. 12 bytes/octets minimum of IPG/IFG for a minimum size
packet/frame per frame, and
2. 26 bytes/octets minimum of IPG/IFG for a maximum size
packet/frame per frame
In both cases the "interFrameGap" AKA "interFrameSpacing" as
defined in the present version of D2.1, is maintained.
My confusion comes in with the note on page 41, lines 42-45,
in section 4.4.2, as you were discussing earlier;
This notes says that this "interFrameGap shrinkage" to 5
bytes/octets is;
"... as measured at the XGMII receive signals at the DTE."
Keeping in mind that +/-100ppm is only one 4-byte column to
be deleted/added every 10,000 4-byte columns, worst case.
I guess I am not clear on how this would ever bring the IFG/IPG
down to 4-5 bytes (1 column) of IPG/IFG on a frame-by-frame
basis ?
Your clarification on this matter would be sincerely
appreciated. (-:
Thanks, & Best Regards,
Julio
==================================================
pat_thaler@agilent.com on 02/20/2001 01:02:24 PM
From: pat_thaler@agilent.com on 02/20/2001 01:02:24 PM
To: sanjeev@cisco.com, pat_thaler@agilent.com, pat_thaler@agilent.com,
stds-802-3-hssg@ieee.org, yariv@galileo.co.il
cc:
Subject: RE: RS minimum IPG
Sanjeev,
I can't quite parse what you've said. In any case, Shimon has pointed
out
where it is specified in 4.4.2. Note that the numbers in 4.4.2 are
10 Mb/s 47 BT
100 Mb/s not specified
1 Gb/s 64 BT
10 Gb/s 40 BT (= 5 Phy characters)
As you can see, consistancy between speeds was not particularly a goal.
Pat
-----Original Message-----
From: Sanjeev Mahalawat [mailto:sanjeev@cisco.com]
Sent: Tuesday, February 20, 2001 12:45 PM
To: pat_thaler@agilent.com; pat_thaler@agilent.com; sanjeev@cisco.com;
stds-802-3-hssg@ieee.org; yariv@galileo.co.il
Subject: RE: RS minimum IPG
At 01:10 PM 02/20/2001 -0700, pat_thaler@agilent.com wrote:
>I dashed off my response too quickly. I meant to say "I don't know of
>anyplace a minimum receive IPG of 4 is stated for 10 Gb/s."
>
>Pat
The original question was why everybody is talking about
shrinking the IPG to 4 bytes. The receive IPG is never shrinked
to 4 bytes and and it is never less than 5 bytes at RS receive
theoritically,
for explained or unexplaned reasons, it is an issue that
specify the preamble and the min IPG that
are "consistence" with the slower speeds those are 4 bytes
min IPG and SFD at RS. I am not sure of you chasing the the place.
Thanks
-Sanjeev
>
>-----Original Message-----
>From: pat_thaler@agilent.com [mailto:pat_thaler@agilent.com]
>Sent: Tuesday, February 20, 2001 9:48 AM
>To: sanjeev@cisco.com; stds-802-3-hssg@ieee.org; yariv@galileo.co.il
>Subject: RE: RS minimum IPG
>
>
>
>Sanjeev,
>
>Where do you find such a definition in the standard? I don't know of
>anyplace a minimum receive IPG of 5 is stated. Further, that is a
parameter
>that has varied based on speed so what it was at 100/1000 Mb/s does not
>limit our choice at 10 Gig.
>
>Regards,
>Pat
>
>-----Original Message-----
>From: Sanjeev Mahalawat [mailto:sanjeev@cisco.com]
>Sent: Monday, February 19, 2001 11:25 AM
>To: stds-802-3-hssg@ieee.org; yariv@galileo.co.il
>Subject: Re: RS minimum IPG
>
>
>
>The min IPG varies from 9 bytes to 15 bytes
>based on the packet size and due to clock compensation
>the PHY may delete a column that will lead to min
>IPG of 5 Bytes. So, thoeritically it should not be
>less than 5 bytes but the spec. always defines it
>to be 4 bytes as this was in the 100/1000 mbps
>specs.
>
>Thanks
>-Sanjeev
>