Thread Links Date Links
Thread Prev Thread Next Thread Index Date Prev Date Next Date Index

Re: Minimum IPG w/ WIS ?



Mike Bly wrote:
Pat,

Thanks for the feedback.  I have a question about trying to shrink the IPG
(sent with the packet) down to 10 or 11 bytes.  Its been my understanding we
are trying to stay with a more conservative calculation in order to avoid
the possibility of overrunning the WIS on transmit, relative to the PPM
tolerances of the clock speeds we are running at.  Additionally, the per
packet IPG actually sent with the packet still has the window of 9-15 bytes
(12 bytes average over time), which is driven by the 64/66 encoding scheme.
Looking at both of these together would imply you want to drive the IPG down
even further to a window of 7-13 bytes, or 8-14 bytes.  If that is true,
does this push us below the 5 byte minimum IPG limit, if a rate-compensation
column-strip occurs on the other end (post elte extraction)?  Or, will the
re-insertion of idles used to bring the data back up to a 10 Gb/s rate
always guarantee avoidance of this?  Is this a non-issue altogether?

<huge snip>

I wanted to jump in with a comment. Reading the thread, it looks like
Mike and Pat both see the issue the same way, just something in the
wording that isn't coming across.

When operating is WIS mode, there is NO reason to perform a rate-
compensation by column strip at the far-end (post ELTE).  A proper
implementation of the ELTE function will adjust the frequency of the
Ethernet payload through the manipulation of H1, H2 and H3 bytes.
When the payload reaches the far-end WIS, the H1, H2 and H3
bytes will be used to recover the original frequency of the ethernet
payload.

The Rx data rate from the PMA at the far-end will be  9.95328Gbps
+/-20ppm. The recovered payload rate out of the WIS block (after H byte
adjustment) will be 9.58Gbps +/- 100ppm. This payload rate then
gets reduced by 64/66 to be 9.29 Gbps +/- 100ppm out of the PCS
decoder.

The data rate into the RS from the PCS is nominally 10Gbps.  Therefore
the PCS will always have to insert (10-9.29) =  710 Mbps worth of idles
to accomodate the rate defficiency.

In summary, there will always be a re-insertion of idles at the PCS
layer. Furthermore, the near-end and far-end PCS blocks operate
as a peer-to-peer connection in WAN mode, therefore if the Tx PCS
meets the minimum IPG, the Rx PCS will start with at least the minimum
IPG and build it up.
 

-- 
Tim Warland     P.Eng.
Hardware Design Engineer  Broadband Products
High Performance Optical Component Solutions
Nortel Networks                (613)765-6634