Re: [STDS-802-3-25G] Question about Table 45-210 EEE advertisement and Table 45-211 EEE LP ability

[Jeff Slavick <000005c17eb8afbd-dmarc-request@xxxxxxxx>]

Hi Brad,

At the very least we I think should reduce the bits to 25GBASE-xR and 25GBASE-xR-S ability bits.  We only advertise those two during AN, so no need to have independent bits for backplane and cables in EEE as well.   I could see setting only the -S bit happening when a PHY supports deep sleep for 10G speed up, but not RS-FEC operation.

Which then begs whether it should be 3 capability bits based on operating mode of the 25G PHY:  25G 64b/66b deep sleep, 25G BASE-R FEC deep sleep, 25G RS-FEC deep sleep.  

-Jeff

On Mon, Aug 10, 2015 at 4:10 PM, Brad Booth <bbooth@xxxxxxxx> wrote:

I was in the process of reviewing the draft and noticed that in 45.2.7.13 and 14 that we're exchanging the ability to support deep sleep for 25G, but that we separate out the advertisement/ability based upon KR/CR and KR-S/CR-S.

Is it really necessary to separate them?

Would someone build a PHY that does KR and KR-S but only provide deep sleep for one of the operating modes?

The reason I'm asking is that we're burning through the last two bits in register 7.61 at the same time folks are talking about doing a 50G project.

Any thoughts or feedback on that?

I'm willing to submit a comment on it, but I thought I'd gauge the sense of the reflector first.

Thanks,
Brad