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You showed a spreadsheet of four possible solutions, and one of them was to measure the DC resistance unbalance of the cabling channel with resistors in series with it.
What is the problem these solutions are solving?
Your question Is not clear to me can you elaborate?
I was trying to ask, what problem is being solved by this?
Please announce when and why the ‘formal meeting’ has ended in the future.
I meant that we continue to discuss after the time of the forma meeting. The formal meeting ends when there is not sufficient attendees or someone ask to finish on time, or most of the group agrees to continue, so after that time we can continue discussion whit out having decisions.
What do you mean by formal ad hoc meeting?
I am working on this direction too and few others that we discuss after the formal 1 hour time of the adhoc meeting.
The entire principle of adding balanced resistance to test imbalanced channel resistance does not represent any real system. PSE PI and PD PI will add imbalance in worst case analysis. At the end of the day only full worst case analysis using all three components will give us the correct worst case maximum current