# Re: [802.3_4PPOE] cable imbalance

```Hi Dave,
Thanks, I will review it and get back to you.
Yair

-----Original Message-----
From: Dave Dwelley [mailto:ddwelley@xxxxxxxxxx]
Sent: Wednesday, August 13, 2014 7:23 AM
To: Darshan, Yair
Cc: STDS-802-3-4PPOE@xxxxxxxxxxxxxxxxx
Subject: cable imbalance

Yair -

Here are my numbers. The top chart shows CP2PRUNB, and the bottom chart shows how that translates into transformer current per pair with a constant power load. I charted the current in the lower resistance pair since that's the one that stresses the transformer.

The lower chart assumes a couple of things:
- PSE with R<<Rcable(100m) (Rpse is not included)
- PD with R<<Rcable(100m) (Rpd is not included)
- active bridge (no diodes) in the PD, no diodes in the PSE

I think this is a realistic use case for a hypothetical Type 4 system. I set the calculation to 80W since that's the largest PD power in this case that keeps the PSE power below 100W. Adding mismatch in the PSE and PD PIs will make things worse - but we'll get to those numbers when we do the PSE/PD PI analysis.

When I look at the lower chart, I see two things:
- the transformer current is worst at the endpoints (as expected)
- the short cable endpoint can be ignored (for this discussion) since we're not disputing the 0.1ohm number. Interestingly, in the 80W case, the 100m cable is the worst case for current, while in the 50W case, the 0.1m cable is the worst.

So: for 100M cable, a 50V PSE, and an 80W PD, I see 1.052A in the transformer with 5% cable mismatch and 1.076A with 7.5%. This is only a ~2.2% difference but is 24mA extra, which is a current difference that the transformer guys have been concerned about in the past. You can play with the numbers by changing the values in cells B5:B12 and B32:B33.

I'll give more exact PD PI calculations in my presentation next week (which I guess I committed to get to you tomorrow night!), but this shows you what I'm concerned about.

We're only talking about a ~1% difference in transformer current here, but if we put the simple "7.5% + 0.1ohm" into section 33.1.4.3 of the spec, I worry it will be interpreted as allowing cabling (not including connectors) P2P mismatch of 7.5%, and the cable manufacturers may loosen their specs accordingly. It can also be interpreted as allowing nearly infinite mismatch for a short channel since we don't define (in section 33.1.4.3) what the minimum connector resistance is. Because of the complex relationship between % mismatch and cable length, it's very easy to misinterpret this seemingly simple spec!

Here's the old 33.1.4.2 language:

"Type 1 and Type 2 operation requires that the resistance unbalance shall be 3 % or less. Resistance unbalance is a measure of the difference between the two conductors of a twisted pair in the 100 Ω balanced cabling system. Resistance unbalance is defined..."

I'd prefer new 33.1.4.3 language like this:

33.1.4.3 Pair Operation Channel Requirement for Pair to Pair Resistance Unbalance

"4P pair operation requires that the resistance unbalance between each set of pairs in the cabling and cordage shall be 5% or less. In addition, total pair-to-pair resistance difference due to any inline connectors shall not exceed 0.1ohm. The combination of these two unbalance terms gives the total resistance unbalance between the channel pairs used for power delivery. Channel pair to pair resistance unbalance is defined by...”

This makes it easier to interpret what we mean, and uses a number (5%) that the cabling industry will recognize. Further, it exactly describes the math with no errors and no margin beyond what is already in the cable and connector specs. And it's only one sentence more than the old text...

Dave

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